Samsung Electronics Co., Ltd.

Gyu-Su Lee

Nam-Soo Kang

Dong-Gyu Kim

Sang-Soo Kim

Jin-Ho Park

Yong-Eun Park

Choong-Seob Oh

Jin-Hyeok Park

Sin-Gu Kang

Ji-Hoon Kim

Dong-gyu Kim

Sun-Kyu Son

Jheen-Hyeok Park

In-Yong Hwang

A liquid crystal display of compact size is disclosed. The liquid crystal display has a tape carrier package and a single integrated PCB for processing a gate driving signal and data driving signal. The tape carrier package includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.

Liquid crystal display panel with signal transmission patterns

A liquid crystal display of compact size is disclosed. The liquid crystal display has a signal transmission film and a single integrated PCB for processing a gate driving signal and data driving signal. The signal transmission film includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.

Signal transmission film and a liquid crystal display panel having the same

A liquid crystal display is provided, which includes: a liquid crystal panel including a plurality of pixels including switching elements, a plurality of gate lines for transmitting gate signals to the switching elements, and a plurality of data lines for transmitting data voltages to the pixels; a data driver including a plurality of data driving ICs connected to respective sets of the data lines, receiving image data, and applying the data voltages corresponding to the image data to the data lines; and a gate driver applying the gate voltages to the gate lines, wherein the data driving ICs are supplied with a ground voltage and a supply voltage and voltage levels of the image data swing with reference to a reference voltage lower than the supply voltage.

Liquid crystal display and driving method thereof

Flat panel display with signal transmission patterns

Signal transmission system

Tape carrier package

Display panel with signal transmission patterns

A liquid crystal display has a signal transmission film and a single integrated PCB for processing a gate driving signal and data driving signal. The signal transmission film includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.

Tape carrier package and a liquid crystal display panel having the same

A liquid crystal display (LCD) includes a plurality of thin-film-transistor (TFT) LCD elements arranged in a plurality of rows, a respective one of the TFT LCD elements including a liquid crystal element having a pixel electrode and a common electrode, a storage capacitor having a first electrode and a second electrode connected to the pixel electrode, and a transistor having a controlled electrode connected to the pixel electrode and a gate electrode which controls current through the controlled electrode. A common electrode voltage is applied to the common electrodes of the liquid crystal elements of the plurality of TFT LCD elements. A respective gate driving voltage is applied to the gate electrodes of a respective row of the TFT LCD elements and to the first electrodes of the storage capacitors of another row of TFT LCD elements other than a first row of TFT LCD elements. A periodic driving voltage is applied to the first electrodes of the storage capacitors of the first row of TFT LCD elements, the periodic driving voltage having a magnitude and a DC bias sufficient to operate the first row of LCD elements according to a first predetermined transmittance characteristic. Related circuits and methods are also discussed.

Liquid crystal displays with row-selective transmittance compensation

Liquid crystal display devices include a first row of viewable liquid crystal display cells having data inputs electrically connected to a plurality of data lines (D1-Dn), control gates commonly connected to a first gate line (e.g., G1) and storage capacitors (Cst) having first electrodes electrically connected to a zeroth gate line (e.g., G0). A second row of viewable liquid crystal display cells are also provided having data inputs electrically connected to a plurality of data lines (D1-Dn), control gates commonly connected to a second gate line (e.g., G2) and storage capacitors (Cst) having first electrodes electrically connected to a first gate line (e.g., G1). Moreover, to maintain the RC delay value of the zeroth gate line at a level equal to the RC delay values associated with the higher order gate lines (e.g., G1-Gn), a row of nonviewable or 'dummy' liquid crystal display cells are provided having data inputs electrically connected to the plurality of data lines, control gates commonly connected to the zeroth gate line and storage capacitors having first electrodes electrically coupled together. This row of nonviewable cells are provided to 'mimic' a row of viewable cells so that the RC delay values associated with the zeroth gate line equals the RC delay value associated with the other gate lines in the array. The row of nonviewable cells may also be replaced by a variable resistance device (e.g., potentiometer, resistor ladder, etc.) and a variable capacitance device which are electrically coupled in series between the zeroth gate line and respective reference potentials (e.g., Vcom, GND, etc.). These variable devices are adjusted so that the total effective RC delay values associated with the zeroth gate line equals the RC delay value associated with the other gate lines.

Thin-film transistor liquid crystal display devices having high

An OFF-state voltage generating circuit regulates an OFF-state voltage level, for thin film transistors (TFT) in a liquid crystal display (LCD). A voltage generator receives a common voltage signal and an inverted common voltage signal and generates an OFF-state voltage to turn off the TFT of an LCD. A voltage regulator adjusts the level of the voltage from the voltage generator by varying the resistance of a variable resistor. A timing circuit keeps the voltage regulator from operating for a time during the initial ON-state of the power supply.

Growing community of inventors

Suwon, South Korea

Gyu-Su Lee