Hynix Semiconductor Inc.

Gyu-Seog Cho

Seiichi Aritome

Eun-Seok Choi

Hyun-Seung Yoo

Han-Soo Joo

Sung-Kye Park

Seok-Kiu Lee

Sung-Joo Hong

A reading method of a non-volatile memory device that includes a plurality memory cells that each include one floating gate and two control gates disposed adjacent to the floating gate on two alternate sides of the floating gate, respectively, and two adjacent memory cells share one control gate, the reading method comprising applying a read voltage to control gates of a selected memory cell, applying a second pass voltage to alternate control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates next to the selected memory cell, and applying a first pass voltage that is lower than the second pass voltage to alternate the control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates secondly next to the selected memory cell.

Reading method of non-volatile memory device

A MOSFET device comprises a semiconductor substrate having a gate area, a storage node contact area and a bit line contact area. A first groove is defined at a first depth in the gate area and a second groove is defined at a second depth in the bit line contact area. A recess gate is formed in the gate area of the semiconductor substrate including the first groove. A first junction area is formed in the storage node contact area of the semiconductor substrate. A second junction area is formed in the bit line contact area of the semiconductor substrate under the second groove.

MOSFET device suppressing electrical coupling between adjoining recess gates and method for manufacturing the same

Growing community of inventors

Gyeonggi-do, South Korea

Gyu-Seog Cho