Electronics and Telecommunications Research Institute

Semes Co., Ltd.

Gyu Hyun Kim

Jong Dae Kim

Dae Woo Lee

Yil Suk Yang

Soon Il Yeo

Chong Ki Kwon

Min Hyung Cho

Yi Gyeong Kim

Seung Chul Lee

Sung Yong Lee

Donghyuk Seo

Seo Jung Park

Tae Sub Lee

An apparatus for treating a substrate is disclosed. The apparatus for treating the substrate includes a housing having a treatment space inside the housing, a plate to support the substrate inside the housing, a heating member provided inside the plate to heat the substrate and including a plurality of heating zones, a temperature measuring member to measure a temperature of the substrate with respect to each of the plurality of heating zones of the heating member, and a control unit to control a temperature for the heating member in a dynamic section of a temperature change graph measured in the temperature measuring member. The control unit performs temperature control with respect to each of the plurality of heating zones of the heating member to uniformize the thickness of the thin film on the substrate.

Apparatus for treating substrate and method for treating apparatus

Provided is a multi-threshold complementary metal oxide semiconductor (MTCMOS) latch circuit including: a data inverting circuit for inverting and outputting input data under the control of a sleep control signal; a transmission gate for transferring the data signal output from the data inverting circuit under the control of a clock control signal; a signal control circuit for outputting the data signal output from the transmission gate under the control of a reset control signal and the sleep control signal; and a feedback circuit for feeding back the signal output from the signal control circuit and preserving the data in a sleep mode. The MTCMOS latch circuit can minimize power consumption caused by a leakage current due to elements scaled down to nano scale and also contribute to high-speed operation of a logic circuit by using an element having a low threshold voltage.

Multi-threshold CMOS latch circuit

A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.

Multi-bit sigma-delta modulator and digital-to-analog converter with one digital-to-analog capacitor

Growing community of inventors

Daejeon, South Korea

Gyu Hyun Kim