Hynix Semiconductor Inc.

Skhynix Inc.

Soulbrain Co., Ltd.

Gyu-Hyun Kim

Cha-Deok Dong

Kwon Hong

Young-Soo Choi

Jae-Wan Park

Jin-Uk Lee

Hyung-Soon Park

Sung-Hyuk Cho

Ji-Hye Han

Jung-Hun Lim

Chan-Keun Jung

A semiconductor device includes an active region having a sidewall, which has a sidewall step, a junction formed under a surface of the sidewall step, and a buried bit line configured to contact the junction.

Semiconductor device with buried bit lines

The present invention provides an etching composition, comprising a silyl phosphate compound, phosphoric acid and deionized water, and a method for fabricating a semiconductor, which includes an etching process employing the etching composition. The etching composition of the invention shows a high etching selectivity for a nitride film with respect to an oxide film. Thus, when the etching composition of the present invention is used to remove a nitride film, the effective field oxide height (EEH) may be easily controlled by controlling the etch rate of the oxide film. In addition, the deterioration in electrical characteristics caused by damage to an oxide film or etching of the oxide film may be prevented, and particle generation may be prevented, thereby ensuring the stability and reliability of the etching process.

Etching composition and method for fabricating semiconductor device using the same

Method of fabricating semiconductor device with buried bit line

A method for fabricating a semiconductor device includes forming a multilayer, forming a plurality of patterns by etching the multilayer and a portion of the substrate, forming a supporter to support the plurality of patterns, and removing residues formed during the etching.

Method for fabricating semiconductor device

A metal line in a semiconductor device includes an insulation layer having trenches formed therein, a barrier metal layer formed over the insulation layer and the trenches, a metal layer formed over the barrier metal layer, wherein the metal layer fills the trenches, and an anti-galvanic corrosion layer formed on an interface between the metal layer and the barrier metal layer.

Metal line in semiconductor device

Metal line in semiconductor device and method for forming the same

Growing community of inventors

Gyeonggi-do, South Korea

Gyu-Hyun Kim