Samsung Electronics Co., Ltd.

Gwangman Lim

Eun-Jin Yun

Shinwoo Park

David T Wang

Host interface devices are provided. A host interface device includes a first pin connected to a first node and a second pin connected to a second node. The host interface device includes a switch connected between the second node and a first voltage terminal, and configured to provide a voltage from the first voltage terminal to the second pin in response to a voltage level of the first node. The host interface device includes a pull-up resistor connected between the first node and a second voltage terminal. Moreover, the host interface device is configured to receive a memory detection signal from a storage device via the first pin when the first pin is electrically connected to the storage device.

Connectors that connect a storage device and power supply control device, and related power supply control devices and host interface devices

A device includes a connector and a detector device. The connector includes at least one first-type pin and at least one second-type pin. The connector is capable of being connected to a corresponding connector of a solid-state drive (SSD) device. The detector device controls the at least one first-type pin to be coupled to a first power supply voltage based on, at least in part, the at least one second-type pin is connected to a second power supply voltage while the corresponding connector of the SSD device is connected to the first connector. If the at least one second-type pin is detected as being connected to a third power supply voltage different from the second power supply voltage while the corresponding connector of the SSD device is connected to the first connector, the detector device controls the at least one first-type pin to be in a non-connected state.

NGSFF and M.2 differentiation and mutual protection circuit

A storage device and a method for indicating a state of a storage device are provided. The storage device may include nonvolatile memory devices, a controller that controls the nonvolatile memory devices, a display device, and a display controller that controls the display device. The display controller may control the display device to display different colors respectively corresponding to states of the storage device. The states may include an access state in which the controller accesses the nonvolatile memory devices according to a request from an external host device, a standby state in which the controller is ready to perform the request from the external host device, a device fail state in which the controller and the nonvolatile memory devices cannot operate, and a replacement state in which the controller and the nonvolatile memory devices are selected for replacement.

Storage device with a display device for indicating a state

Case for a circuit board

A storage device includes nonvolatile memory devices, a connector that includes connection terminals, and a controller that communicates with an external host device through the connector and to control the nonvolatile memory devices. The connector provides the external host device with detection information in response to the connector being connected with the external host device. Power is supplied from the external host device to the controller and the nonvolatile memory devices through the connector in response to the providing of the detection information. The connector provides the external host device with information of a communication type in which the controller communicates with the external host device, after the power is supplied. The communication type is one of a first communication type and a second communication type. The controller configures the connection terminals to correspond to a single or dual port based on a signal received from the external host device.

Storage device supporting multiple communication types and operating method thereof

SSD storage device

Disclosed is a memory module which includes a memory chip; an external input/output terminal having an electrical signal input/output terminal and an optical signal input/output terminal; an optical signal processor configured to convert a first optical signal input through the optical signal input/output terminal into a first internal electrical signal and to convert a second internal electrical signal into a second optical signal; and a controller configured to provide a first data signal to the memory chip in response to a first external electrical signal input through the electrical signal input/output terminal or the first internal electrical signal and to transfer the second internal electrical signal to the optical signal processor or to output a second external electrical signal to the electrical signal input/output terminal in response to a second data signal output from the memory chip.

Growing community of inventors

Seoul, South Korea

Gwangman Lim