Cmosis Nv

Cmosis Bvba

Ams Sensors Belgium Bvba

Ams Ag

Ams International Ag

Cypress Semiconductor Corporation (Belgium) Bvba

Cypress Semiconductor Corporation

Stichting Imec Nederland

Guy Meynants

Jan Bogaerts

Jens Hofrichter

Adi Xhakoni

Thomas Troxler

Gerhard Eilmsteiner

Bram Wolfs

Josef Pertl

Tim Blanchaert

Koen Ruythooren

Juan Santana

Richard Van Den Hoven

Koen Van Wichelen

Xinyang Wang

Ali Jaderi

Pieter De Wit

Gérald Lepage

A pixel with enhanced quantum efficiency comprises a semiconductor body that has a first surface configured as an entrance surface and a light capturing region configured for capturing light that is incident on the first surface. The pixel further comprises a structured interface, isolation layers on at least two surfaces of the semiconductor body that are perpendicular to the first surface, and a filter element that is arranged at a distance from the first surface such that light that is incident on the first surface at an angle of incidence smaller than a critical angle impinges on the filter element.

Pixel of a semiconductor image sensor and method of manufacturing a pixel

An image sensor comprises an array comprising rows and columns of pixels, a first number N of connection lines connected to a first number N of pixels of the array, a voltage regulating circuit having an output, a first terminal, and a driver circuit. The driver circuit has a first number N of switches coupled to the first number N of connection lines and to the output of the voltage regulating circuit, and a first number N of further switches coupled to the first number N of connection lines and to the first terminal. The first number N is at least two.

Pixel drive voltage generation using a charge pump

An image sensor system has a pixel array with a plurality of pixels, each of the pixels comprising a photodiode, a pixel buffer and a transfer gate coupled between the photodiode and an input of the pixel buffer. A voltage supply block is configured to generate a pixel supply voltage from an input voltage based on a first reference voltage and to provide the pixel supply voltage to the pixel array. A calibration processing block is configured to determine an average pixel signal based on an average of individual pixel signals at outputs of the pixels of the pixel array and to determine a correction value based on the average pixel signal and a reference pixel signal. A correction processing block is configured to determine the first reference voltage based on a combination of a second reference voltage and the correction value.

Image sensor system, electronic device and method for operating an image sensor

A photodetector in semiconductor material is provided with a first transfer gate between the photodetector and a first diffusion region in the semiconductor material, a second transfer gate between the photodetector and a second diffusion region in the semiconductor material, a capacitor connected between the first diffusion region and the second diffusion region, a first switch connected between the first diffusion region and a first reference voltage, and a second switch connected between the second diffusion region and a second reference voltage.

Pixel structure, image sensor device and system with pixel structure, and method of operating the pixel structure

The backside illuminated image sensor comprises a substrate of semiconductor material, detector elements arranged at a main surface, a dielectric layer on or above the main surface, a first capacitor layer and a second capacitor layer above the main surface, the capacitor layers forming a capacitor (C, C). A peripheral circuit is integrated in the substrate apart from the detector elements, the peripheral circuit being configured for one or more operations of the group consisting of voltage regulation, charge pump operation and stabilization of clock generation, and the capacitor layers are electrically connected with contact regions of the peripheral circuit.

Backside illuminated image sensor

The package comprises a carrier, an electronic device arranged on the carrier, a shield arranged on the electronic device on a side facing away from the carrier, and an absorber film comprising nanomaterial applied on or above the shield.

Radiation-hardened package for an electronic device

The semiconductor device comprises a substrate of semiconductor material having a main surface, an integrated circuit in the substrate, a photodetector element or array of photodetector elements arranged at or above the main surface, and at least one nanomaterial film arranged above the main surface. At least part of the nanomaterial film has a scintillating property. The method of production includes the use of a solvent to apply the nanomaterial film, in particular by inject printing, by silk-screen printing, by spin coating or by spray coating.

Semiconductor device for indirect detection of electromagnetic radiation and method of production

The semiconductor image sensor device comprises a semiconductor layer having a main surface and an opposite rear surface, and a charge carrier generating component at the main surface. The charge carrier generating component is arranged between a top reflecting layer and a bottom reflecting layer, which are arranged outside the semiconductor layer.

Resonant cavity enhanced image sensor

An analog-to-digital converter () comprises an analog signal input () for receiving an analog signal and an amplifying stage () configured to generate a set of N amplified analog signals, where N is an integer &#x2265;2. The set of N signals have different gains. The ADC has a ramp signal input () for receiving a ramp signal and a clock input () for receiving at least one clock signal. A comparison stage () is connected to the set of amplified analog signals (SigG, SigG) and to the ramp signal input (). The comparison stage () is configured to compare the amplified analog signals with the ramp signal to provide comparison outputs during a conversion period. A control stage is configured to control the counter stage () based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.

Analog-to-digital conversion and method of analog-to-digital conversion

An image sensor comprises an array of pixels comprising: a pinned photodiode; a first sense node A; a second sense node B; a transfer gate TX connected between the pinned photodiode and the first sense node A; a first reset transistor Mconnected between a voltage reference line Vrst and the second sense node B; a second reset transistor Mconnected between the first sense node A and the second sense node B; and a buffer amplifier Mhaving an input connected to the first sense node A. The control logic is arranged to operate the pixels in a low conversion gain mode and in a high conversion gain mode. In each of the conversion gain modes the control logic is arranged to operate one of a first reset control line RSand a second reset control line RSto continuously switch on one of the first reset transistor Mand the second reset transistor Mduring a readout period of an operational cycle of the pixels.

Image sensor

An image sensor comprises a first die with an array of pixels and a second die. The first die and second die are stacked together. A first in-pixel part of an analog-to-digital converter (ADC) outputs at least one current signal. The first in-pixel part of the ADC is a Differential Transconductance Amplifier includes a first differential input for receiving the analog signal and a second differential input for receiving a reference signal. There is at least one output bus connected between the first in-pixel part of the ADC on the first die and the second part of the ADC on the second die. The first part of the ADC is adapted to output the at least one current signal to the at least one output bus, and the second part of the ADC is adapted to receive the at least one current signal and to generate a digital signal.

In-pixel differential transconductance amplifier for ADC and image sensor architecture

A pixel structure comprises an epitaxial layer () of a first conductivity type. A photo-sensitive element comprises a first region (4) of a second conductivity type and a second region (3) of the first conductivity type positioned between the epitaxial layer () and the first region (4). A charge storage node (&#xf8;2) is arranged to store charges acquired by the photo-sensitive element, or to form part of a charge storage element. A third region (2) of the second conductivity type is positioned between the charge storage node and the epitaxial layer. The pixel structure further comprises a charge-to-voltage conversion element () for converting charges from the charge storage node to a voltage signal and an output circuit () for selectively outputting the voltage signal from the pixel structure.

Pixel structure

A pixel array includes a plurality of pixel structures, with each pixel structure having a photo-sensitive element for generating charge in response to incident light; a charge conversion element; a first transfer gate and a second transfer gate connected in series between the photosensitive element and the charge conversion element or between the photosensitive element and a supply line; and an output stage. A first transfer gate control line is connected to the first transfer gates of a first sub-set of the pixel structures in the array; and a second transfer gate control line connected to the second transfer gates of a second sub-set of the pixel structures in the array. The first sub-set of pixel structures and second sub-set of pixel structures partially overlap, having at least one pixel structure in common between them.

Pixel array with individual exposure control using at least two transfer gates for a pixel or pixel region

A pixel array for imaging comprises an array of pixels of a first pixel type and a second pixel type. Each pixel of the first pixel type comprises a first photo-sensitive element having a first area. Each pixel of the second pixel type comprises a second photo-sensitive element and a third photo-sensitive element. The second photo-sensitive element has a second area, which is smaller than the first area. Only the second photo-sensitive element in the pixel of the second pixel type is connected to a readout circuit. The third photo-sensitive element is connected to a charge drain via a permanent connection or a switchable connection. Outputs of the second photo-sensitive elements can be used to perform phase detect autofocussing.

Pixel array

An analog-to-digital converter for generating an output digital value equivalent to the difference between a first analog signal level (Vres) and a second analog signal level (Vsig) comprises at least one input for receiving the first analog signal level and the second analog signal level, an input for receiving a ramp signal and an input for receiving at least one clock signal. A set of N counters, where N&#x2267;2, are arranged to use N clock signals which are offset in phase from one another. A control stage is arranged to enable the N counters based on a comparison of the ramp signal with the first analog signal level (Vres) and the second analog signal level (Vsig). An output stage is arranged to output the digital value which is a function of values accumulated by the N counters during a period when they are enabled.

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Guy Meynants