Saifun Semiconductors Ltd.

Kla Tencor Corporation

Kla Corporation

Applied Materials Israel Limited

Spansion Israel Ltd

Saifon Semiconductors Ltd.

Aifun Semiconductors Ltd.

Guy Cohen

Boaz Eitan

Vladimir Levinski

Daniel Kandel

Eli Lusky

Eduardo Maayan

Dana Klein

Amnon Manassen

Noam Sapiens

Eran Amit

Nuriel Amir

Pavel Izikson

Efraim Rotem

Michael E Adel

Nadav Gutman

Daria Negri

Yuri Paskover

Ohad Bachar

Joel L Seligson

Amir Widmann

Alexander Svizher

Assaf Shappir

Tal Marciano

Yan Polansky

Nimrod Shuall

Moshe Baruch

Irina Vakshtein

Alex Shulman

Arik Rizel

Vladimir Kamenetsky

A method for detecting a rare stochastic defect, the method may include searching for a rare stochastic defect in a dense pattern of a substrate, wherein the rare stochastic defect is (a) of nanometric scale, (b) appears in a functional pattern of the substrate with a defect density that is below 10, and (c) appears in the dense pattern with a defect density that is above 10; wherein the dense pattern is a dense representation of the functional pattern that differs from the functional pattern by at least one out of (a) a distance between features of the dense pattern, and (b) a width of the features of the dense pattern; and estimating the occurrence of the rare stochastic defect within the functional pattern based on an outcome of the searching.

System and method for detecting rare stochastic defects

The present invention may include acquiring a plurality of overlay metrology measurement signals from a plurality of metrology targets distributed across one or more fields of a wafer of a lot of wafers, determining a plurality of overlay estimates for each of the plurality of overlay metrology measurement signals using a plurality of overlay algorithms, generating a plurality of overlay estimate distributions, and generating a first plurality of quality metrics utilizing the generated plurality of overlay estimate distributions, wherein each quality metric corresponds with one overlay estimate distribution of the generated plurality of overlay estimate distributions, each quality metric a function of a width of a corresponding generated overlay estimate distribution, each quality metric further being a function of asymmetry present in an overlay metrology measurement signal from an associated metrology target.

Method and system for providing a quality metric for improved process control

The disclosure is directed to designing and using an overlay target with orthogonal underlayer dummyfill. According to various embodiments, an overlay target may include one or more segmented overlay pattern elements forming at least one overlay target structure. The overlay target may further include one or more inactive pattern elements forming at least one dummyfill target structure. Each of the one or more inactive pattern elements may include dummyfill segmented along an axis orthogonal to a segmentation axis of at least one proximately disposed overlay pattern element. In some embodiments, each of the target structures or layers may be formed from a separate process layer successively disposed upon a substrate, such as a silicon wafer. In some embodiments, the overlay and dummyfill target structures may be twofold or fourfold rotationally symmetric to allow for certain manufacturing or metrology advantages.

Overlay targets with orthogonal underlayer dummyfill

Metrology methods are provided for deriving metrology measurement parameter value(s) by identifying the value(s) in which the corresponding metrology measurement signal(s) have minimal amplitude asymmetry. Selecting the measurement parameter values as disclosed reduces significantly the measurement inaccuracy. For example, wavelength values and/or focus values may be detected to indicate minimal amplitude asymmetry and/or minimal phase asymmetry. In certain embodiments, wavelength values which provide minimal amplitude asymmetry also provide minimal signal sensitivity to focus. Developed metrics may be further used to indicate process robustness across wafers and lots. In some embodiments, imaging accuracy may be enhanced by through-focus landscaping of the amplitude asymmetry and detection of parameters values with minimal amplitude asymmetry.

Estimating amplitude and phase asymmetry in imaging technology for achieving high accuracy in overlay metrology

A system for measuring overlay from a multi-layer overlay target for use in imaging based metrology is disclosed. The system is configured for measuring overlay from a multi-layer overly target that includes three or more target structures, wherein a first target structure is disposed in a first process layer, a second target structure is disposed in a second process layer, and at least a third target structure is disposed in at least a third process layer. The system includes an illumination source configured to illuminate the target structures of the multi-layer overlay target, a detector configured to collect light reflected from the target structures, and one or more processors configured to execute a set of program instructions to determine overlay error between two or more structures based on the collected light from the plurality of targets.

Multi-layer overlay metrology target and complimentary overlay metrology measurement systems

A multi-layer overlay target for use in imaging based metrology is disclosed. The overlay target includes a plurality of target structures including three or more target structures, each target structure including a set of two or more pattern elements, wherein the target structures are configured to share a common center of symmetry upon alignment of the target structures, each target structure being invariant to N degree rotation about the common center of symmetry, wherein N is equal to or greater than 180 degrees, wherein each of the two or more pattern elements has an individual center of symmetry, wherein each of the two or more pattern elements of each target structure is invariant to M degree rotation about the individual center of symmetry, wherein M is equal to or greater than 180 degrees.

The present invention may include measuring tool induced shift (TIS) on at least one wafer of a lot of wafers via an omniscient sampling process, randomly generating a plurality of sub-sampling schemes, each of the set of randomly generated sub-sampling schemes having the same number of sampled fields, measuring TIS at each location of each of the randomly generated sub-sampling schemes, approximating a set of TIS values for each of the randomly generated sub-sampling schemes utilizing the TIS measurements from each of the randomly generated sub-sampling schemes, wherein each set of TIS values for each of the randomly generated sub-sampling schemes is calculated utilizing an interpolation process configured to approximate a TIS value for each location not included in a randomly generated sub-sampling scheme, and determining a selected sub-sampling scheme by comparing each of the calculated sets of TIS values to the measured TIS of the omniscient sampling process.

Method and system for providing tool induced shift using a sub-sampling scheme

Aspects of the present disclosure describe systems and methods for calibrating a metrology tool by using proportionality factors. The proportionality factors may be obtained by measuring a substrate under different measurement conditions. Then calculating the measured metrology value and one or more quality merits. From this information, proportionality factors may be determined. Thereafter the proportionality factors may be used to quantify the inaccuracy in a metrology measurement. The proportionality factors may also be used to determine an optimize measurement recipe. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Method for estimating and correcting misregistration target inaccuracy

The present invention includes an illumination source, at least one illumination symmetrization module (ISM) configured to symmetrize at least a portion of light emanating from the illumination source, a first beam splitter configured to direct a first portion of light processed by the ISM along an object path to a surface of one or more specimens and a second portion of light processed by the ISM along a reference path, and a detector disposed along a primary optical axis, wherein the detector is configured to collect a portion of light reflected from the surface of the one or more specimens.

Optics symmetrization for metrology

The present invention may include performing a first measurement process on a wafer of a lot of wafers, wherein the first measurement process includes measuring one or more characteristics of a plurality of targets distributed across one or more fields of the wafer, determining a set of process tool correctables for a residual larger than a selected threshold level utilizing a loss function, wherein the loss function is configured to fit a model for one or more process tools, as a function of field position, to one or more of the measured characteristics of the plurality of targets, wherein the set of process tool correctables includes one or more parameters of the model that act to minimize the difference between a norm of the residual and the selected threshold, and utilizing the determined process tool correctables to monitor or adjust one or more processes of the process tools.

Method and system for providing process tool correctables

An exclusion region of interest imaging overlay target includes a self-symmetric target structure including two or more pattern elements, and an additional target structure including two or more pattern elements, wherein each of pattern elements of the additional target structure is contained within a boundary defined by one of the pattern elements of the self-symmetric target structure, wherein the self-symmetric target structure is characterized by a composite exterior region of interest, wherein the composite exterior region of interest is formed by removing two or more exclusion zones corresponding with the pattern elements of the additional target structure from an exterior region of interest encompassing the self-symmetric target structure, wherein each of the pattern elements of the additional target structure is characterized by an interior region of interest, wherein the self-symmetric target structure and the additional target structure are configured to have a common center of symmetry upon alignment.

Imaging overlay metrology target and complimentary overlay metrology measurement system

A method for reading a bit of a memory cell in a non-volatile memory (NVM) cell array, the method comprising providing a memory cell comprising a bit to be read and at least one other bit not to be read, and reading the bit to be read with respect to a multi-bit reference cell, the reference cell comprising a first bit at a first non-ground programmed state and a second bit at a second non-ground programmed state. Compared with the prior art, the present invention may enable achieving an improved sensing accuracy together with improved read disturb immunity.

Reading array cell with matched reference cell

Selecting a read voltage level for a NVM cell by using an initial value for the read voltage and performing a read operation, comparing an actual number of bits found to an expected number of bits and, if there is a discrepancy between the actual number and the expected number, adjusting the read voltage level, based on variable data such as statistics available, level occupation, neighbor level, previous chunks data, and other data used during read, program or erase. For example, based on a number of missing bits, or upon a result of a previous read operation, or a result obtained at another program level, or upon how many times the memory cell has been cycled, or upon how many memory cells are at each program level, or on a number of bits at another program level in a selected chunk of memory.

Rd algorithm improvement for NROM technology

As part of the present invention, a memory cell may be operated using reference cells having a threshold offset circuit. According to some embodiments of the present invention, a threshold offset value may be determined for a memory cell to be operated based on a location (e.g. memory segment within a memory array) of the memory cell. An input offset circuit of a global reference cell may be adjusted by the threshold offset value for the memory cell; and the memory cell may be operated (e.g. read, written or erased) using the global reference cell whose input offset circuit has been adjusted by the threshold offset value. According to some embodiments of the present invention global reference cells may consist of multiple sets of reference cells, wherein, according to some aspects, each set of the multiple sets of reference cells may be used for operating a different memory array segment. According to other aspects, each set of the multiple sets of reference cells may be used for operating a different state of memory array cells.

Method, system and circuit for operating a non-volatile memory array

The present invention is a multi-phase method, circuit and system for programming non-volatile memory ('NVM') cells in an NVM array. The present invention may include a controller to determine when, during a first programming phase, one or more NVM cells of a first set of cells reaches or exceeds a first intermediate voltage, and to cause a charge pump circuit to apply to a terminal of the one or more cells in the first set second phase programming pulses to induce relatively greater threshold voltage changes in cells having less stored charge than in cells having relatively more stored charge.

Growing community of inventors

Yaad, Israel

Guy Cohen