International Business Machines Corporation

Gustav E Sittmann, Iii

Damian Leo Osisek

John R Flanagan

Daniel Francis Casper

Lisa Cranton Heller

Dan F Greiner

Matthew J Kalos

Charles W Gainey, Jr

Catherine C Huang

Ugochukwu Charles Njoku

Dale Francis Riedy, Jr

Harry M Yudenfriend

Janet R Easton

Roger Gregory Hathorn

Louis William Ricci

Mark S Farrell

David F Craddock

Mark P Bendyk

Timothy John Slegel

William Alan Holder

Thomas Anthony Gregg

Scott M Carlson

Richard P Tarcza

Leslie W Wyman

Frank William Brice

Donald W Schmidt

Bernd Nerz

Hubertus Franke

Erwin F Pfeffer

Martin Schwidefsky

Randall W Philley

Ingo Adlung

Ray Mansell

Jong Hyuk Choi

Jerry Wayne Stevens

Peter Kenneth Szwed

Beth A Glendening

Tan Lu

Christian Jacobi

Jeffrey Paul Kubala

Kenneth J Oakes

Eric N Lais

Patricia G Driever

Richard K Errickson

Geoffrey Owen Blandy

Angelo Macchiano

Alexandra Winter

Charles E Shapley

Stephen G Wilkins

Ugochukwu Njoku-Charles

Louis C Ricci

Chung-Lung K Shum

Clint Alan Hardy

Bruce H Ratcliff

Susan Kay Candelaria

Bret Wayne Holley

George Kuch

Raymond Michael Higgs

Matthew Richard Craig

Eugene P Hefferon

Marten J Halma

Brenton F Belmar

Timothy J Siegel

Carol B Hernandez

Hans-Helge Lehmann

Mark P Gardiner

Cynthia Sittmann, Legal Representative

Harry M Yunderfriend

Matthew L Kalos

Chung-Lung Kevin Chum

Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.

Performing an operation absent host intervention

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

Set buffer state instruction

Processing within a computing environment that supports pageable guests is facilitated. Processing is facilitated in many ways, including, but not limited to, associating guest and host state information with guest blocks of storage; maintaining the state information in control blocks in host memory; enabling the changing of states; and using the state information in management decisions. In one particular example, the guest state includes an indication of usefulness and importance of memory contents to the guest, and the host state reflects the ease of access to memory contents. The host and guest state information is used in managing memory of the host and/or guests.

Facilitating processing within computing environments supporting pageable guests

Executing a Next Instruction Access Intent instruction by a computer. The processor obtains an access intent instruction indicating an access intent. The access intent is associated with an operand of a next sequential instruction. The access intent indicates usage of the operand by one or more instructions subsequent to the next sequential instruction. The computer executes the access intent instruction. The computer obtains the next sequential instruction. The computer executes the next sequential instruction, whose execution comprises, based on the access intent, adjusting one or more cache behaviors for the operand of the next sequential instruction.

Next instruction access intent instruction for indicating usage of a storage operand by one or more instructions subsequent to a next sequential instruction

A computer program product for processing input/output (I/O) data is provided for performing a method that includes receiving a transport control word (TCW) including an indirect data address including a starting location of a transport mode indirect data address list (TIDAL) of storage addresses, the TIDAL including a plurality of entries configured as transport mode indirect data address words (TIDAWs). The method includes accessing an entry of the TIDAL, which includes: 1) based on the entry of the TIDAL indicating that the address is a data address, gathering data from a data storage location corresponding to the data address, and accessing a next entry of the TIDAL, and 2) based on the entry of the TIDAL indicating that the address is an address of a next entry of the TIDAL, obtaining the next entry of the TIDAL from another storage location that is located non-contiguously to the entry storage location.

Providing indirect data addressing in an input/output processing system where the indirect data address list is non-contiguous

Performing a clear operation absent host intervention

A computer program product for processing input/output (I/O) data is provided for performing a method, which includes receiving a control word having an indirect data address including a starting location of a list of storage addresses, gathering the data and transmitting gathered data to a control unit in the I/O processing system. Gathering includes accessing an entry of the list, the entry located at an entry storage location and including an address. Based on the entry of the list indicating that the address is a data address, data is gathered from a data storage location, and a next entry of the list is accessed. Based on the entry of the list indicating that the address is an address of a next entry of the list, the next entry of the list is obtained from another storage location that is located non-contiguously to the entry storage location.

An instruction is provided to establish various operational parameters for an adapter. These parameters include adapter interruption parameters, input/output address translation parameters, resetting error indications, setting measurement parameters, and setting an interception control, as examples. The instruction specifies a function information block, which is a program representation of a device table entry used by the adapter, to be used in certain situations in establishing the parameters. A store instruction is also provided that stores the current contents of the function information block.

Controlling the selectively setting of operational parameters for an adapter

An authorization mechanism allows a host executing a guest operating system to grant permission for the guest to directly access an adapter function's address spaces without host intervention. This access is via instructions implemented based on the architecture of the adapter function. The host also has the capability to intervene in the execution of the instruction, if desired.

Guest access to address spaces of adapter

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Webster Groves, MO, United States of America

Gustav E Sittmann, Iii