Intel Corporation

Gurmukh Singh

Frank Patrick O'Mahony

Stephen Kim

Ajay Balankutty

Jihwan Kim

Sandipan Kundu

Bong Chan Kim

Kai Yu

Yutao Liu

Richard Packard

A quadrature clock generator that takes advantage of the inherently low delay of a shunt-series inductively peaked clock buffer to generate quadrature clocks with the high jitter performance using just one additional stage in Q path compared to I path. The generator includes a delay cell that uses shunt-series peaking and uses a resistive DAC in series with the shunt inductor to provide a large delay range with good jitter characteristics. The resistive DAC can be placed near a real or a virtual ground to minimize capacitive loading on the signal path. This delay cell can provide greater than 2× delay tuning range and is suitable for clocks at high frequencies. This delay cell can also be used as a ring oscillator with large frequency tuning range. A low voltage differential signaling termination switch control that uses feed forward mechanism to control termination impedance of device in a receiver.

Wide-range inductor-based delay-cell and area efficient termination switch control

Growing community of inventors

Gilbert, AZ, United States of America

Gurmukh Singh