Northern Lights Semiconductor Corp.

Guoqing Zhan

James Chyi Lai

Vicki Wilson

Ray Buske

A MRAM memory and process thereof is described. A GMR magnetic layer is patterned to form a memory bit layer and an intermediate conductive layer. The intermediate conductive layer is disposed between two conductive layers such that shallow metal plugs can be utilized to interconnect the intermediate conductive layer and the conductive layers. Thus, a conventional deep tungsten plug process, interconnecting two conductive layers, is eliminated.

Magnetoresistive random access memory with improved layout design and process thereof

A conductive plug located in a planar dielectric layer, under GMR memory cells, are used to directly connect the lower ferromagnetic layer of one of the GMR memory cell and a conductive layer under the planar dielectric layer.

Interconnect for a GMR memory cells and an underlying conductive layer

A giant magnetoresistance (GMR) pad on the same level of GMR memory bit layer is used as an intermediate connection for plugs between the GMR pad and an underlying diffusion metal layer. A single large power metal plug is used to connect the GMR pad and the overlying power plane metal.

Interconnect connecting a diffusion metal layer and a power plane metal and fabricating method thereof

A method and a structure are provided for improving the contact of two adjacent GMR memory bits. Two adjacent bit ends are connected by utilizing a single via.

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Saint Paul, MN, United States of America

Guoqing Zhan