Yozan Corporation

Sharp Kabushiki Kaisha Corporation

Sharp Corporation

Ntt Mobile Communications Network, Inc.

Kokusai Electric Co., Ltd.

Other

Sumitomo Metal Industries, Inc.

Kokusai Electric Corporation

Guoliang Shou

Makoto Yamamoto

Sunao Takatori

Changming Zhou

Weikang Yang

Kazunori Motohashi

Xuping Zhou

Mamoru Sawahashi

Fumiyuki Adachi

Kenzo Urabe

Kunihiko Suzuki

Jie Chen

Takashi Tomatsu

Wiwat Wongwarawipat

Shengmin Lin

Xiaoling Qin

Toshiyuki Matsumoto

Yoshihiro Hirota

Ying Chen

Chanming Zhou

Tetsuhiko Miyatani

Muneo Harada

Nobuaki Kawahara

Takahiko Ooasa

Ichiro Matsumoto

Xiaoling Oin

Fumihito Ito

Wiwat Wongwirawipat

Jian Luo

Sunao Taktori

An analog calculation circuit in a filter circuit is corrected in the calculation error by estimating the error from a calculation result of known inputs and known multiplier. A multiplier is changed according to the estimated error. The filter circuit has a voltage to current converter at an input side and a current to voltage converter at an output side and a calculation of current is performed therein.

Filter circuit utilizing a plurality of sampling and holding circuits

A receiver for spread spectrum communication system receives a traffic channel and common control channel by a plurality of matched filters at least one of which is selectively available for the traffic or the common control channel. At the initial acquisition, a plurality of matched filters are used for receiving the common control channel. At the hand-over, a plurality of matched filters are used to receive traffic channels of the current base station and the base stations in the adjacent cells.

Spread spectrum communication system

An A/D converter having a plurality of thresholding circuits corresponding to bits of output digital data, each of which includes odd number of inverters serially connected from a first stage to a last stage. The first stage inverter of the thresholding circuits have thresholds equal to a weights of the bits. The inverters of the last stage are of thresholds different from those of the first stage.

Analog to digital converter

A signal reception apparatus in the spread spectrum communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A rake combiner synchronously combines the phase-corrected de-spread received signals of each path.

Receiver in a spread spectrum communication system having low power analog multipliers and adders

An output of analog complex matched filter is simplified to be a one dimensional signal such as electrical power. Multi-path detection is performed by the simplified signal. The output of the matched filter is received and processed only when peaks occur in the one dimensional signal.

Receiver apparatus for CDMA communication system

A compact and easily-assembled circuit for a complex despreading system, arranged such that the circuit does not contain pairs of adders at the output area. The configuration of the circuit enables the addition and subtraction of different signal components to occur before the multiplication stage and not at a pair of adders located at the output area The complex despreader system employs a complex matched filter at a receiver for despreading received signals with a QPSK system in the primary modulation and a BPSK system in the secondary modulation modulated at a transmitter. The input area of each matched filter of I and Q channels includes a pair of adders. One adder generates a first signal having a positive in-phase and a positive quadrature component. The other adder generates a second signal having a negative in-phase component and a positive quadrature component. Next, an I-channel multiplication circuit multiplies both components of the first signal by a spread code then adds the multiplication results together. Likewise, a Q-channel multiplication and addition circuit multiplies the components of the second signal by a spread code and then adds the multiplication results together.

Complex despreading system

The present invention provides a path-diversity system featuring a small-size phase compensating circuit. This circuit calculates a compensating coefficient according to the signals of a pilot block or a pair of pilot blocks surrounding an information block, and then compensates information signals thereafter by the calculated compensating coefficient.

Path-diversity receiving method and system of spread spectrum communication

The present invention has an object to provide a spread spectrum communication system for heightening the speed of communication. The present invention transfers the first PN code sequence itself as the first component, adds and transfers zero or more instances of the second PN code sequence given a phase difference as the second component, and defines an information for transmitting by the number of the second PN codes corresponding to a cycle of said first PN code sequence.

In one aspect, the present invention provides a low power consumption matched filter. The signal received at an input terminal is input to a shift register having stages equal to the spread code length number after conversion into digital signals in an A/D converter. The outputs of the shift register stages are input to XOR circuits set corresponding to each stage, so that XOR operations are performed between the outputs and corresponding spread code bits d,to d,. The outputs of the XOR circuits are analogously added in an analog adder and output from an output terminal. In another aspect, a filter circuit uses an analog operation circuit to prevent lowered operational accuracy caused by residual charge. Input analog signals successively undergo sampling and holding in sample-and-hold circuits, are multiplied by coefficients stored in a shift register by multiplication circuits, and added in an addition circuit. Sample data transmission error storage is prevented by shifting coefficients in the shift register. Sample-and-hold circuits and multiplication circuits are formed by analog operation circuits, and each include a switch for canceling the residual charge. The sample-and-hold circuits and multiplication circuits normally working are refreshed sequentially by providing circuits for replacing their function. The addition circuit is refreshed in the same way.

Matched filter for spread spectrum communication systems and hybrid analog-digital transversal filter

A complex multiplication circuit of a calculation formula equivalent but different from the usual formula. The calculation formula is as follows:

Complex multiplication circuit

In a method is disclosed for transmitting and receiving a transmission data signal, after the transmission data signal is generated, it is modulated by a first time spread root Nyquist filter to generate a transmission signal. The signal is then transmitted and received, whereupon the signal is transformed into a baseband signal. The baseband signal is then demodulated through a second time spread root Nyquist filter to revive the transmission data signal. An apparatus is also disclosed that performs this method. In addition, methods of separately transmitting and receiving signals are also described.

Time spread root Nyquist filter

A waiting circuit which is utilized in a mobile communication system. The waiting circuit detects a predetermined signal from a base station. The waiting circuit starts other circuits in the mobile communication system which are in a sleep mode when the predetermined signal is received. The predetermined signal is generated in the base station. The predetermined signal has a speed equal to a predetermined symbol rate and is modulated to be an intermediate frequency signal. The intermediate frequency signal is sampled in response to a sampling clock that has a speed equal to an integer times the symbol rate. The sampled intermediate frequency signal is input to a match filter which multiplies the sample signal by a predetermined sequence of coefficients.

Waiting circuit

Phases of the spread spectrum signal are corrected with a high degree of accuracy by a minimum of circuitry. One of phase correction circuits 31-34 of the receiver corresponds to each path. The I-component and Q-component of a despread output are supplied to the phase correction circuits 31-34. A phase error extractor 1 extracts the first phase error from a received pilot block. A phase corrector 2 corrects the phase error of a received information symbol using a correction vector that has been calculated based on the first phase error. The RAKE synthesizer 25 synthesizes the corrected received signal with outputs of the phase correction A circuits of other paths and outputs the synthesized signal to a temporary determiner 3 which temporarily determines an information symbol to be processed. The phase error is modified in a correction vector modifier 4 using the temporary determination result. A new correction vector is calculated based on the modified phase error. In this way, the correction vectors are sequentially modified based on the temporary determination results for the information symbols.

Phase correction method and apparatus for spectrum spread wireless

A computational circuit for a multi-value addition comprising a parallel adder, an output adder, a quantizing portion and a logic conversion portion. Addition circuits in the above adders and thresholding circuits in the above quantizing portion consist of voltage-driven circuits including capacitive couplings.

Computational circuit

The present invention reduces the circuit area of a semiconductor system including a capacitance. To realize it, a unit capacitor electrode conductor is curved to detour a metal terminal head portion used for common electrode, the metal terminal head portion for a common electrode is chamfered, or the cyclic position of a row of adjacent unit capacitor electrodes is shifted.

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Tokyo, Japan

Guoliang Shou