Intel Corporation

Guojing Zhang

Pei-yang Yan

John Magana

Ted Liang

Robert L Bristol

Richard E Schenker

Tristan A Tronic

Yang Cao

Chang Ju Choi

Joseph C Langston

Shoudeng Liang

Arvind Sundaramurthy

The present disclosure is directed to a reticle assembly having a reticle and a pellicle attached to a pellicle support frame positioned on the reticle and includes a sensor assembly having optical and sensor components, which monitor the pellicle. The optical components and the sensor components of the sensor assembly may be coupled to a controller, which may be further coupled to one or more semiconductor process tools.

Real-time detection of deflections and ruptures of EUV pellicle membranes

Embodiments disclosed herein include EUV reticles and methods of forming such reticles. In an embodiment a method of forming an EUV reticle comprises providing a reticle, where the reticle comprises, a substrate, a mirror layer over the substrate, where the mirror layer comprises a plurality of first mirror layers and second mirror layers in an alternating pattern, and a capping layer over the mirror layer. In an embodiment, the method may further comprise disposing a first layer over the capping layer, patterning an opening in the first layer, and disposing a second layer in the opening, where the second layer is disposed with an electroless deposition process.

Method and apparatus for fabrication of very large scale integration pattern features via electroless deposition on extreme ultraviolet lithography photomasks

Monolithic framed pellicle membrane integrating a structural framing member with a membrane spanning the framing member. The monolithic frame pellicle membrane is suitable as an overlay of a reticle employed in lithography operations of integrated circuit manufacture. A semiconductor-on-insulator (SOI) wafer may be machined from the backside, for example with a bonnet polisher, to form a pellicle framing member by removing a portion of a base semiconductor substrate of the SOI wafer selectively to top semiconductor layer of the SOI wafer, which is retained as a pellicle membrane. In some exemplary embodiments suitable for extreme ultraviolet (EUV) lithography applications, at least the top semiconductor layer of the SOI wafer is a substantially monocrystalline silicon layer.

Monolithically framed pellicle membrane suitable for lithography in the fabrication of integrated circuits

Embodiments described herein comprise extreme ultraviolet (EUV) reticles and methods of forming EUV reticles. In an embodiment, the reticle may comprise a substrate and a mirror layer over the substrate. In an embodiment, the mirror layer comprises a plurality of alternating first mirror layers and second mirror layers. In an embodiment, a phase-shift layer is formed over the mirror layer. In an embodiment, openings for printable features and openings for non-printable features are formed into the phase-shift layer. In an embodiment, the non-printable features have a dimension that is smaller than a dimension of the printable features.

EUV phase-shift SRAF masks by means of embedded phase shift layers

The present invention discloses an EUV mask having an improved absorber layer with a certain thickness that is formed from a metal and a nonmetal in which the ratio of the metal to the nonmetal changes through the thickness of the improved absorber layer and a method of forming such an EUV mask.

Absorber layer for EUV

An extreme ultraviolet light (EUV) mask structure and method are disclosed to address the structural and processing requirements of EUV lithography. A mask absorber layer anisotropically etched with minimal etch bias at a relatively fast etch rate, is combined with a thin ruthenium layer, to produce a mask obviating the need for a conventional buffer or cap layer.

High performance EUV mask

The present invention discloses a method of increasing the contrast of an EUV mask at inspection by forming a multilayer mirror over a substrate; forming an absorber layer over the multilayer mirror; forming a top layer over the absorber layer; patterning the mask into a first region and a second region; and removing the top layer and the absorber layer in the first region.

Enhanced inspection of extreme ultraviolet mask

Extreme ultraviolet mask with improved absorber

A silicon-substrate based reflective photolithographic mask fabrication technique is described. The process begins with a multilayer, resonant reflecting substrate. A thin layer of silicon dioxide or other material capable of acting as an etch stop layer is deposited thereon. Then, a transmissive layer is deposited on the thin layer of etch stop layer. The transmissive layer is substantially transmissive to the wavelength of light used in the photolithography as well as capable of being selectively etched relative to the underlying etch stop layer. Then, the transmissive layer is etched to open preselected, absorptive areas. An absorptive layer is then deposited thereon. The absorptive layer is substantially absorptive to the wavelength of light used as well as capable of completely filling the opened areas of the transmissive layer. The absorptive layer is then planarized, and a thin protective cap is deposited thereon.

Using thin films as etch stop in EUV mask fabrication process

A novel mask for photolithography in semiconductor processing and the mask fabrication method is disclosed. The mask includes a substrate, a patterned buffer layer, a patterned absorber layer above the patterned buffer layer, and a protective cap. The substrate preferably contains a multilayer resonant reflective surface. The buffer layer and protective cap are transmissive to the wavelength of light used in the photolithography. The absorber layer is absorptive to the wavelength of light used in the photolithography. The mask is fabricated by first depositing the buffer layer. The absorber layer is formed on the buffer layer. Both absorber layer and buffer layer are etched to create a pattern. A protective cap layer is then deposited on the patterned absorber layer and buffer layer, and the protective cap is planarized as needed to create a substantially smooth mask surface.

Growing community of inventors

Saratoga, CA, United States of America

Guojing Zhang