Chinese Academy of Sciences

Guohao Yu

Baoshun Zhang

Fu Chen

Yong Cai

Wenxin Tang

Xiaodong Zhang

Zhihua Dong

The present application discloses a vertical UMOSFET device with a high channel mobility and a preparation method thereof. The vertical UMOSFET device with a high channel mobility includes an epitaxial structure, and a source, a drain and a gate which match the epitaxial structure, where the epitaxial structure includes a first semiconductor, and a second semiconductor and a third semiconductor which are sequentially disposed on the first semiconductor, a groove structure matching the gate is also disposed in the epitaxial structure, and the groove structure continuously extends into the first semiconductor from a first surface of the epitaxial structure; a fourth semiconductor is also disposed at least between an inner wall of the groove structure and the second semiconductor, and the fourth semiconductor is a high resistivity semiconductor.

Vertical UMOSFET device with high channel mobility and preparation method thereof

The present disclosure discloses a ballistic transport semiconductor device based on nano array and a manufacturing method thereof. The ballistic transport semiconductor device based on nano array comprises a conducting substrate, more than one semiconductor nano bump portion is arranged on a first surface of the conducting substrate, a top end of the semiconductor nano bump portion is electrically connected with a first electrode, a second surface of the conducting substrate is electrically connected with a second electrode, the second surface and the first surface are arranged back to back, and the height of the semiconductor nano bump portion is less than or equal to a mean free path of a carrier. The carrier is not influenced by various scattering mechanisms in a transporting procedure by virtue of the existence of ballistic transport characteristics, thereby obtaining a semiconductor device having advantages of lower on resistance, less working power consumption.

Ballistic transport semiconductor device based on nano array and manufacturing method

A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (), a drain electrode (), a main gate (), a top gate (), an insulating dielectric layer () and a heterostructure, wherein the source electrode () and the drain electrode () are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor () and a second semiconductor (); the first semiconductor () is disposed between the source electrode () and drain electrode (); the second semiconductor () is formed on the surface of the first semiconductor () and is provided with a band gap wider than the first semiconductor (); the main gate () is disposed at the side of the surface of the second semiconductor () adjacent to the source electrode (), and is in Schottky contact with the second semiconductor (); the dielectric layer () is disposed on the surfaces of the second semiconductor () and the main gate () and between the source electrode () and the drain electrode (); the top gate () is formed on the surface of the dielectric layer (), at least one side edge of the top gate extends towards the direction of the source electrode () or the drain electrode (), and the orthographic projection of the top gate overlaps with the two side edges of the main gate (). When the HEMT device is at work, the main gate () and the top gate () are respectively controlled by a control signal. The device can effectively inhibit the 'current collapse effect'.

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Suzhou, China

Guohao Yu