Agency for Science, Technology and Research

Fujikura Limited

Integrated Device Technology, Inc.

Guo-Qiang Patrick Lo

Mingbin Yu

Kensuke Ogawa

Kazuhiro Goi

Xiaoguang Tu

Junfeng Song

Ning Guan

Shih-Ked Lee

Ken Sakuma

Tsung-Yang Liow

Xianshu Luo

Yong Tsong Tan

Hwee Gee Teo

Chuen-Der Lien

Dim-Lee Kwong

Xiang Li

Navab Singh

Wanqing Cao

Xinpeng Wang

Qingxin Zhang

Chao Li

Chih-Hsiang Chen

Qing Fang

Gaolong Jin

Xian Tong Chen

Fei Sun

Ning Duan

Shao Hua Tao

Shi Yang Zhu

Kee-Soon Darryl Wang

Huijuan Zhang

Wei-Yip Loh

Louis Huang

In various embodiments, an optical alignment structure may be provided. The optical alignment structure may include a light carrying structure configured to receive an input optical light from an external light source. The optical alignment structure may further include a light redirection mechanism coupled to the light carrying structure. The light redirection mechanism may be configured to receive the input optical light from the light carrying structure. The light redirection mechanism may be further configured to redirect the input optical light back to the light carrying structure, the redirected input optical light configured to be detected by a detector for alignment of the optical alignment structure with the external optical source.

Optical alignment structure and method of determining alignment information

An optical waveguide device includes a substrate; a lower cladding disposed on the substrate; a rib waveguide including a slab disposed on the lower cladding and a single rib disposed on the slab contiguous to the slab; and an upper cladding disposed on the rib waveguide. The rib waveguide includes a first doped region having a first electric conductivity exhibiting a P-type electric conductivity across the rib and the slab and a second doped region being contiguous to the first doped region and having a second electric conductivity exhibiting an N-type electric conductivity across the rib and the slab.

Optical waveguide device and method of manufacturing the same

According to embodiments of the present invention, a photodetector arrangement is provided. The photodetector arrangement includes a plurality of germanium-based photodetectors, each germanium-based photodetector configured to receive an optical signal and to generate an electrical signal in response to the received optical signal, and an electrode arrangement arranged to conduct the electrical signals.

Photodetector arrangement

An optical sensing system may include a light separation element configured to separate an input light into a plurality of sliced lights and a first resonator configured to receive one sliced light of the plurality of sliced lights. An effective refractive index of the first resonator may be changeable in response to a change in a refractive index of a cladding of the first resonator, a second resonator coupled to the first resonator and a detector configured to measure an intensity of the sliced light, the intensity of the sliced light based on a difference between a resonant wavelength of the first resonator and a resonant wavelength of the second resonator. The difference between a resonant wavelength of the first resonator and a resonant wavelength of the second resonator may be based on the effective refractive index of the first resonator.

Optical sensing system and method of determining a change in a refractive index in an optical sensing system

An optical circuit for sensing a biological entity in a fluid and a method of configuring an optical circuit for sensing a biological entity in a fluid are provided. The optical circuit includes a sensing arrangement including a reference arm having a reference waveguide and a sensing arm having a waveguide; wherein lengths of the reference waveguide and the waveguide are configured in accordance with a temperature dependency reduction criterion.

Optical circuit for sensing a biological entity in a fluid and method of configuring the same

According to embodiments of the present invention, a resistive memory arrangement is provided. The resistive memory arrangement includes a nanowire, and a resistive memory cell including a resistive layer including a resistive changing material, wherein at least a section of the resistive layer is arranged covering at least a portion of a surface of the nanowire, and a conductive layer arranged on at least a part of the resistive layer. According to further embodiments of the present invention, a method of forming a resistive memory arrangement is also provided.

Resistive memory arrangement and a method of forming the same

According to embodiments of the present invention, a semiconductor photomultiplier device is provided. The semiconductor photomultiplier device includes a substrate having a front side and a back side, a common electrode of a first conductivity type adjacent to the back side, and a cell including an active region of a second conductivity type adjacent to the front side, and a contact region of the second conductivity type adjacent to the front side, the contact region being spaced apart from the active region by a separation region.

Semiconductor photomultiplier device

An embodiment of the invention relates to an optical resonator. The optical resonator includes an input optical waveguide and a closed loop coupled to the input optical waveguide. The closed loop is adapted to receive light from the input optical waveguide, wherein the closed loop includes at least one hole formed within a portion of the closed loop.

Optical resonator and optical sensing system comprising the same

A method for manufacturing a planar optical waveguide device of which a core includes a plurality of alternatively arranged fin portions and valley portions to form a grating structure, in which the core widths of the valley portions vary along the longitudinal direction, the method including: a high refractive index material layer forming step of forming a high refractive index material layer; a photoresist layer forming step of forming a photoresist layer on the high refractive index material layer; a first exposure step of forming shaded portions on the photoresist layer using a phase-shifting photomask; a second exposure step of forming shaded portions on the photoresist layer using a binary photomask; a development step of developing the photoresist layer; and an etching step of etching the high refractive index material layer using the photoresist pattern resulted from the development step.

Manufacturing method of planar optical waveguide device with grating structure

An electro-optic device is disclosed. The electro-optic device includes an insulating layer, a first semiconducting region disposed above the insulating layer and being doped with doping atoms of a first conductivity type, a second semiconducting region disposed above the insulating layer and being doped with doping atoms of a second conductivity type and an electro-optic active region disposed above the insulating layer and between the first semiconducting region and the second semiconducting region. The electro-optic active region includes a first partial active region and a second partial active region and an insulating structure in between. The insulating structure extends perpendicular to the surface of the insulating layer such that there is no overlap of the first partial active region and the second partial active region in the direction perpendicular to the surface of the insulating layer. A method for manufacturing is also disclosed.

Electro-optic device with novel insulating structure and a method for manufacturing the same

The wafer arrangement () provided comprises a first wafer (), which comprises an integrated circuit and a recess (). The wafer arrangement further comprises a portion of a second wafer (), which comprises a carrier portion and a protrusion (), the protrusion comprising an active component or actively controlled component () such as a MEMS component, wherein the portion of the second wafer () is coupled to the first wafer () such that the protrusion () is received in the recess (). The invention provides a mechanism for accurately aligning an active component () on the second wafer () with components on the first wafer (), such as photonic, electronic or optical components.

Wafer arrangement and a method for manufacturing the wafer arrangement

A method for manufacturing a planar optical waveguide device including a core of which a top face is provided with a groove section filled with a groove section filler made of a low refractive index material having a refractive index lower than that of the core, the method including; a first high refractive index material layer forming step of forming a high refractive index material layer; a low refractive index material layer forming step of forming a low refractive index material layer made of the low refractive index material on the high refractive index material layer; a groove section filler forming step of forming the groove section filler by trimming both lateral portions of the low refractive index material layer; and a second high refractive index material layer forming step of forming a high refractive index material layer so as to fill the both sides of the lateral portions of the groove section filler.

Sidewall spacers are disclosed that extend on opposing sidewalls of gate stacks. The sidewall spacers have improved profiles to suppress or eliminate void formation between the gate stacks during gap-filling A gate dielectric layer is formed on a semiconductor substrate. Then, a gate stackhaving a sidewall is formed over the gate dielectric layer. The gate stackcomprises a conductive layerand a hard maskoverlying the conductive layer. A lineris selectively deposited over the gate stacksuch that the lineris deposited on the hard maskat a rate lower than the rate of deposition on the conductive layer. Thus, the lineris substantially thinner on the hard maskthan on the conductive layer. A nitride spacer is formed overthe liner. A PMD layer is formed over the resultant structure, filling the gaps between adjacent gate stacks.

Gate structures having sidewall spacers formed using selective deposition

The present invention includes SRAM memory cells and methods for forming SRAM cells having reduced soft error rate. The SRAM cell includes a first NMOS transistor and a first PMOS transistor having a common gate, and a second NMOS transistor and a second PMOS transistor having a common gate. A first resistor is electrically coupled on one end to the drains of the first PMOS transistor and the first NMOS transistor; and is electrically coupled on the other end to the common gate of the second NMOS and second PMOS transistors. A second resistor is electrically coupled on one end to the drains of the second PMOS transistor and the second NMOS transistor; and is electrically coupled on the other end to the common gate of the first NMOS transistor and the first PMOS transistor. The added resistor can be embedded in a contact opening such that it does not take up valuable surface area on the semiconductor substrate. Thereby, data loss from soft errors can be avoided while preserving small memory cell size.

Memory cell with reduced soft error rate

A method for fabricating a MOSFET structure is disclosed. A coating is provided on the upper surface of a gate. Thereafter doped regions are implanted into the substrate. A layer is provided over the MOSFET structure and etched to form spacers. The MOSFET structure is reacted with salicide-forming reactant to produce a salicide MOSFET.

Growing community of inventors

Singapore, Singapore

Guo-Qiang Patrick Lo