International Business Machines Corporation

Guo Hui Lin

Yu Yang

Yi Ge

Yang Liu

Yu Meng Li

Min Zhu

Yu Fen Yuan

Qiang Liu

Yong Hua Lin

Tao Zhou

Ling Shao

Yan Qi Wang

Zhi Liang

Hang Jun Ye

Weikai Xie

Lu Wan

Yung Hua Lin

A filter and method of filtering modifies the computation order to accommodate horizontal symmetric filtering, and modifies the source operands while modifying the single instruction multiple data (SIMD) computation, so as to eliminate such heavy overhead of transposing a pixel matrix. The filter and method of filtering reformats the equations involved in the prior art to the following equations, thereby acquiring the interpolation results by reducing the required clock cycles to three cycles:0*(|0+5|1+6|2+7|3+8|)1*(|1+4|2+5|3+6|4+7|)+2*(|2+3|3+4|4+5|5+6|)+

Filter and method for filtering

The present invention provides a central processing unit for processing at least one encrypted software. The encrypted software comprises at least one encrypted software section. The encrypted software section is encrypted with a management key MK, and the MK being encrypted with a device key DK as a encrypted MK. The central processing unit comprises processing and cache unit, and cryptographic unit. The cryptographic unit comprises device key storage unit for storing the DK, a plurality of management key storage units for storing MKs, wherein each management key storage unit corresponding to a management key index MKI, and decryption unit. The decryption unit decrypts a encrypted MK with the DK to obtain a MK, stores the MK to a management key storage unit, and output a MKI corresponding to the management key storage unit, thus the MKI is used to correspond to the encrypted software section. Wherein, the decryption unit invokes corresponding MK according to the MKI and decrypts the encrypted software section, and directly transfers the decrypted software code and/or data to the processing and cache unit.

Method and central processing unit for processing encrypted software

A traffic balancing system, traffic balancing device and traffic balancing method that converts IP packets by switching IP address of the destination host between the dual stack hosts communicating with each other, in order to control traffic balancing in the networks.

Network system, traffic balancing method, network monitoring device and host

A method and system for preventing skipping the playback of a special content section of a digital media stream is provided. The method comprises a method for providing a digital media stream on the providing side, and a method for playing back a digital media stream as provided by the above providing method on the playing back side. The providing method comprises: decoding an encoded special content section of a digital media stream; generating an encryption key based on the decoded data of the special content section; encrypting a normal content section of the digital media stream using the encryption key; and providing the digital media stream comprising the encoded special content section and the encrypted normal content section. The playback method comprises: receiving the digital media stream; decoding the special content section of the digital media stream; generating an encryption key based on the decoded data of the special content section by using the same method for generating the encryption key in providing the digital media; decrypting the normal content section of the digital media stream using the encryption key; and playing back the special content section and normal content section of the digital media stream.

Method and system for preventing skipping playback of a special content section of a digital media stream

The present invention provides a Field Programmable Gate Array (FPGA), a system for debugging a Field Programmable Gate Array, a method for debugging a Field Programmable Gate Array, a FPGA configuration data product and a method and system for configuring a FPGA. According to one aspect of the invention, there is provided a Field Programmable Gate Array (FPGA) having a logic unit under test and comprising: a probe signal selecting unit configured to select at least one probe point from a plurality of probe points in said logic unit under test, and obtain a probe signal at said probe point; and a high speed serial transceiver configured to convert said probe signal into a high speed serial signal and transmit it to outside.

FPGA and method and system for configuring and debugging a FPGA

Video On Demand system providing video programs between a program provider and a plurality of clients coupled over a peer to peer network. Transmitting a requested video program from a first client on a first channel. Allocating a second channel for transmitting the video program requested by a second client. The first client forwarding the video program to the second client on the second channel from the beginning of the video program received and stored. Controlling the second client to receive and store the video program sent on the first channel in synchronization with the first client. Merging the second channel into the first channel in response to notification that the program received from the first client by the second client reaches a starting point of the program received and stored by the second client. Notifying the first client to stop sending the video program to the second client.

Peer to peer video on demand system selectively using client and server to forward the requested video program to another client

Growing community of inventors

Beijing, China

Guo Hui Lin