Robert Bosch

Gunnar Piel

Gary Morgan

Nico Bannow

Herbert Leuwer

Jens Gladigau

Peter Munk

Rakshith Amarnath

Simon Hufnagel

Claus Steinle

Florian Kraemer

Andreas Brune

Joachim Breithaupt

Arnaud Riess

Steffen Klinger

Christiane Engel-Winter

A method/device for recognizing a microprocessor hardware error, including comparing a first application's first result, running on a first microprocessor, with a second application's second result, running on the first/second microprocessor, with a microcontroller, providing comparison strategies, the hardware error being recognized as a function of the comparison, the microcontroller receiving a first message from the first microprocessor, and receiving a second message from the first microprocessor if the second application runs on the first microprocessor, or receives a first message from the second microprocessor if the second application runs thereon, the first message containing first comparison strategy information and first result information of a first function calculation, the second message containing second comparison strategy information and second result information of a second function calculation, the first and second strategy information being compared, the first and second result information being compared if the information about the comparative strategy coincides.

Method and device for recognizing hardware errors in microprocessors

A method for securing an application programming interface of a utility program library, including at least one program construct, of a hypervisor, including a configuration of the hypervisor that assigns at least one permissible call of the program construct to at least one guest system of the hypervisor, and a code generation, supported by the configuration, of a declaration of the program construct adapted to the guest system.

Method and device for securing the application programming interface of a hypervisor

A hypervisor manages a read buffer, a write buffer and a queuing buffer in a memory used jointly by the first virtual machine and the second virtual machine, the read buffer, the write buffer and the queuing buffer having the same size. The hypervisor assigns the read buffer to a read area readable by the first virtual machine, assigns the write buffer to a write area writable by the second virtual machine and assigns the queuing buffer to a queuing area of the memory that is inaccessible to the first virtual machine and to the second virtual machine. In response to a first request by the first virtual machine, the hypervisor performs a reader-side exchange of the read buffer for the queuing buffer and in response to a second request by the second virtual machine, the hypervisor performs a writer-side exchange of the write buffer for the queuing buffer.

Hypervisor enabling secure communication between virtual machines by managing exchanging access to read buffer and write buffer with a queuing buffer

A method for the quasi-parallel execution of threads, including: within a time slice, time-limited resources, particularly a computing time, are allotted to the threads by a preemptive first scheduler on the basis of a priority of the threads, and the first scheduler is combined with further schedulers.

Method and device for the quasi-parallel execution of threads

A memory protection unit including hardware registers for entering address tables, a configuration memory for storing the address tables, a preconfigured hardware logic for managing the configuration memory, a data connection between the configuration memory and the hardware logic for loading the hardware registers, a first interface for controlling the loading by a computing core, and a second interface for writing to the configuration memory by the computing core.

Memory protection unit, memory management unit, and microcontroller

A method for the on-board diagnosis of a control unit which include a hypervisor and at least one guest system operated under the hypervisor. In the method, the guest system receives a diagnosis inquiry at an individual diagnosis address of the guest system from a diagnostic tool with the aid of a communication infrastructure. The guest system makes a self-diagnosis. The guest system receives a hypervisor diagnosis from the hypervisor. The guest system transmits, at its diagnosis address, the self-diagnosis or the hypervisor diagnosis to the diagnostic tool as a function of the diagnosis inquiry.

Method and device for the on-board diagnosis of a control unit including a hypervisor and at least one guest system operated under the hypervisor

A method for setting up an array of technical units and such an array are presented. The method is used for the independent setup and operation of an array of technical units, the technical units being connected to one another via a system communication bus, a query for a system resource being transmitted from a querying unit to all other units, all other units checking whether the resource has already been assigned to this unit itself, and all querying units transmitting an appropriate response to the querying units and the system resource being assigned thereto if it is not already assigned to one of the other units.

Growing community of inventors

Hemmingen, Germany

Gunnar Piel