Samsung Electronics Co., Ltd.

Yonsei University

Skhynix Inc.

Gun Ko

Won Woo Ro

Hongju Kal

Wonseb Jeong

Seokmin Lee

Hyunwuk Lee

Ipoom Jeong

Jiwon Lee

Sung Jae Lee

Min Seong Kim

Yong Tag Song

Wonwoo Ro

A memory management unit includes a TLB configured to cache PTEs including a mapping between a virtual and a physical frame number, and to convert a virtual address into a physical address using the cached PTEs. A page table walk request queue is configured to queue page requests corresponding to a virtual page number when a TLB miss is occurred, and one or more PTWs are configured to acquire a PTE from the main memory, and to convert the virtual page numbers into physical frame numbers using the PTE. A PTW is configured to select associated page table walk requests having the same base address of corresponding virtual page numbers, to consecutively provide cache line requests for acquiring PTEs corresponding to the associated page table walk requests, to acquire the PTEs corresponding to the associated PTE requests, and to provide the acquired PTEs to the TLB.

Memory management unit and method of walking page table

A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.

Data processing system and method for accessing heterogeneous memory system including processing unit

A memory system includes a memory device including a first area being refreshed according to a first refresh period and a second area begin refreshed according to a second refresh period longer than the first refresh period. The memory system also includes a memory controller configured to generate a write command and a write data corresponding to a first write request and a first data.

Memory device including a plurality of area having different refresh periods, memory controller controlling the same and memory system including the same

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Gunpo, South Korea

Gun Ko