Cadence Design Systems, Inc.

Guilherme Seminotti Braga

Rodrigo Fonseca Rocha Soares

Artur Melo Mota Costa

Abner Luis Panho Marciano

Adriana Cassia Rossi De Almeida Braz

Raquel Lara Dos Santos Pereira

Tulio Paschoalin Leao

Alberto Manuel Arias Drake

Laiz Lipiainen Santos

Paula Selegato Mathias

Gabriel Guedes De Azevedo Barbosa

Tales Bontempo Cunha

Rogério De Souza Moraes

Hudson Dyele Oliveira

Caio Texeira Campos

Breno Rodrigues Guimares

The present disclosure relates to a computer-implemented method for use in an electronic design. Embodiments may include receiving, using at least one processor, a user input corresponding to a command in an electronic design automation environment. Embodiments may further include comparing the user input with a portion of an electronic design database. Embodiments may also include providing a final command suggestion based upon, at least in part, the comparison.

Systems and methods for command interpretation in an electronic design automation environment

Disclosed are techniques for implementing formal verification of an electronic design. These techniques identify a target property for verification in a hierarchical electronic design that has a plurality of hierarchies and perform hierarchical synthesis on a hierarchy or a portion thereof in the plurality of hierarchies while black-boxing a remaining portion of the hierarchical electronic design. Cone of influence (COI) data that is relevant to the target property may be determined at least by extracting the cone of influence data from a hierarchically synthesized hierarchy or portion of the hierarchy or the portion thereof. At least the cone of influence data may be forwarded to a formal engine that uses the cone of influence data to verify the target property.

Methods, systems, and computer program product for verifying an electronic design

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Belo Horizonte, Brazil

Guilherme Seminotti Braga