International Business Machines Corporation

Gui Haochen

Ting Wang

Yang Liu

Xiao Ping Guo

Qi Cheng Li

Yi Bu Li

Qing Shan Zhang

Zheng Chen

Jiu Fu Guo

Fei Fei

Yangming Wang

Xiao Hua Zeng

Chaofan Qiu

Hua Qing Li

Ao Hang

A method, computer program product, and computer system are provided. An enhanced compiler identifies instructions for execution among them, instructions directed to an inner computation unit of a CPU core. In response to identifying instructions directed to the inner computation unit, locating in a system call table a system call to indicate a begin of an executable code block of instructions that are directed to the inner computation unit of the CPU core. The enhanced compiler searches the system hardware registry for the parameter corresponding to the inner computation unit of the CPU core. The system call is inserted as an interrupt instruction in the compiler output at the begin of the executable code block of instructions that are directed to the inner computation unit of the CPU core. The enhanced compiler executable code output is saved for later selection by a scheduler of an operating system.

Operating system (OS) scheduler and compiler for code generation optimization in a (simultaneous multi-threading) SMT enabled CPU

Instruction cache behavior and branch prediction are used to improve the functionality of a computing device by profiling branching instructions in an instruction cache to identify likelihoods of proceeding to a plurality of targets from the branching instructions; identifying a hot path in the instruction cache based on the identified likelihoods; and rearranging the plurality of targets relative to one another and associated branching instructions so that a first branching instruction that has a higher likelihood of proceeding to a first hot target than to a first cold target and that previously flowed to the first cold target and jumped to the first hot target instead flows to the first hot target and jumps to the first cold target.

Instruction cache behavior and branch prediction

Aspects of the present disclosure describe techniques for managing locks in just-in-time compiled code in a software application. An example method generally includes profiling locks by during execution of the JIT compiled code. Locks are generally profiled by identifying locks on resources accessed by the JIT compiled code, and recording access information for each of the identified locks. When a safepoint is reached during execution of the JIT compiled code, one or more locks eligible for conversion to a biased lock are identified .based on the recorded access information for each of the identified locks, one or more locks eligible for conversion to a biased lock. Each respective lock of the one or more eligible locks is converted to a biased lock based on a current lock status of the respective lock.

Efficient profiling-based lock management in just-in-time compilers

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Shanghai, China

Gui Haochen