Micron Technology Incorporated

Guangcan Chen

Tetsuya Arai

Mieko Kojima

Kazuyuki Morishige

Chihoko Yokobe

Atsushi Mamba

Disclosed herein is an apparatus that includes a first wiring layer including first and second conductive patterns extending in a second direction and coupled to source and drain regions, respectively, and a second wiring layer including third and fourth conductive patterns extending in the second direction and coupled to the first and second conductive patterns, respectively. The first conductive pattern has first and second sections arranged in the second direction, and the second conductive pattern has third and fourth sections arranged in the second direction. The first and fourth sections are arranged in a first direction, and the second and third sections are arranged in the first direction. The third conductive pattern covers the first section without covering the second section. The fourth conductive pattern covers the third section without covering the fourth section.

Semiconductor device having output buffer

Embodiments of the disclosure include signal processing methods to precondition signals for transmission on a high speed bus. A preconditioning circuit is configured to receive a serialized data signal at an input node and to precondition the serialized output data signal to provide a preconditioned output signal at an output node. The pre-conditioning circuit may include a feedback circuit coupled between the input node and the output node that is configured to independently control both of a propagation delay between the output node and the input node and a magnitude of emphasis/de-emphasis applied to a signal at the output node for provision to the input node.

Apparatuses and methods for signal transmission preconditioning

Apparatuses and methods for pre-emphasis control are described. An example apparatus includes a pull-up circuit and a pull-down circuit. The pull-up circuit is configured to receive a pull-up data activation signal and drive a data terminal to a pull-up voltage responsive to an active pull-up data activation signal. The pull-down circuit is configured to receive a pull-down activation signal and drive a data terminal to a pull-down voltage responsive to an active pull-down data activation signal. The example apparatus further includes a pre-emphasis circuit that includes a pre-emphasis timing control circuit configured to provide a timing control signal, and further includes a logic circuit. A pre-emphasis control signal based on at least one of the pull-up and pull-down data activation signals is provided to control providing pre-emphasis having a timing based on a mode of operation.

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Machida, Japan

Guangcan Chen