Au Optronics Corporation

Guang-Ren Shen

Wei-Ming Huang

Pei-Ming Chen

Chun-Hsiun Chen

Sheng-Chao Liu

Jia-Hong Ye

Shin-Shueh Chen

Wu-Hsiung Lin

Po-Hsueh Chen

Chuan-Sheng Wei

Chang-Yu Huang

A pixel structure and a manufacturing method thereof are provided. In the pixel structure, an electrode of a storage capacitor is formed when an active layer is formed, and the electrode and the active layer are made of the same material. The material of the electrode and the active layer can be an oxide semiconductor with high transmittance. Therefore, a stable display frame of the pixel structure can be provided by the storage capacitor, an aperture ratio of the pixel structure can be improved, and power consumption can be further reduced.

Pixel structure and manufacturing method thereof

A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

Fabricating method of a thin film transistor having a dielectric layer for inhibiting leakage current

A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.

Bottom gate thin film transistor and active array substrate

Growing community of inventors

Yunlin County, Taiwan

Guang-Ren Shen