Acer Inc.

Guan-Yu Hou

Tz-Yu Fu

Wei-Kuo Shih

Chun-Chih Kuo

Ming Feng Hsieh

A power control method for a memory storage device and a memory storage system are provided. The method includes configuring a power controller in a host system, controlling, by the power controller, a power gate disposed between the host system and the memory storage device, and controlling a power supply of the memory storage device from the host system by the power gate, wherein the power gate is not controlled by a Basic Input Output System (BIOS) controller of the host system.

Power control method for a memory storage device and a memory storage system

A computer system, a game loading method thereof and a computer readable storage medium are provided. The computer system includes a first storage, a second storage and a processor. The first storage stores multiple game files of a game. The access rate of the second storage is faster than the first storage. The processor is coupled to the first and second storages. The processor performs the game, stores corresponding game files in the first storage into the second storage according to process of the game, and access the game files stored in the second storage to continue progress of the game. Accordingly, loading time of game scene can be reduced, so as to improve gaming experience.

Computer system, game loading method thereof and computer readable storage medium

A data writing method and a storage controller are provided. The data writing method includes: selecting a plurality of first dies and a plurality of second dies from a plurality of dies of the flash memory module, receiving a writing command and determining an amount of write data corresponding to the writing command, and when the amount of write data is greater than a threshold, writing in a pSLC mode the write data into the second dies.

Data writing method and storage controller

A computer system and a power management method thereof are provided. The computer system includes a storage apparatus and a processor. The processor is coupled to the storage apparatus. The processor obtains a state transition time of the storage apparatus. The state transition time is the time the storage apparatus takes to enter a power state and leave the power state. The processor changes a transition tolerance time according to the state transition time. In response to an idle timeout, the processor determines whether the storage apparatus enters the power state according to a comparison result between the transition tolerance time and the state transition time. Accordingly, power consumption and performance are improved.

Computer system and power management method thereof

A storing method is provided. The storing method includes: receiving a driving instruction by a host, wherein the driving instruction triggers a driver to collect a user information, and the driver generates a hit rate information according to the user information and generates a mapping table according to the hit rate information; receiving the mapping table from the driver by a processing unit of a storage device, wherein the storage device does not have any dynamic random access memory (DRAM); storing the mapping table in a static random access memory (SRAM); storing a plurality of storing data in a number of NAND flash memories, wherein when the host receives an accessing instruction, the processing unit reads the mapping table in the SRAM to find the storing data corresponding to the accessing instruction.

Growing community of inventors

Taipei, Taiwan

Guan-Yu Hou