Realtek Semiconductor Inc.

National Central University

Guan-Yu Chen

Leaf Chen

Ming-Hui Tung

Chien-Wen Chen

An-Ming Lee

Bo-Yu Chen

Li-Jun Gu

Yue-Ming Hsin

Tsung-Yen Liu

Fang-Ping Chou

Ching-Wen Wang

A clock circuit has a clock input terminal, a first clock output terminal, and a second clock output terminal. The clock circuit includes a pulse width adjustment module, a sampling module, a comparing module, and a differential signal converting module. A differential input terminal is electrically connected to a pulse width output terminal of the pulse width adjustment module. A positive differential signal output terminal and a negative differential signal output terminal are electrically connected to the first clock output terminal of the clock circuit and the second clock output terminal to output two clock signals with a phase difference of 180 degrees, respectively. A second input terminal of the sampling module is electrically connected to the second clock output terminal.

Clock circuit having a pulse width adjustment module

An analog switch circuit is disclosed. The analog switch circuit includes a MOSFET and a control switch. The MOSFET includes a drain electrode, a source electrode, a gate electrode, and a body electrode. A gate bias is applied on the gate electrode to control whether the MOSFET is ON or OFF. The control switch includes a control terminal, a first terminal, a second terminal, and a third terminal. A control bias relating to the gate bias is applied to the control terminal so that the first terminal is connected to the second terminal when the MOSFET is ON, and the first terminal is connected to the third terminal when the MOSFET is OFF. The second terminal is connected to a first voltage source providing a first bias. The third terminal is connected to a second voltage source providing a second bias different from the first bias.

Analog switch circuit applicable to high frequency signal

A switch and a multiplexer including the same are provided, which are applicable to selectively transmit the high frequency signal from an input terminal to an output terminal therethrough. The switch includes a switch device and a variable resistor. The switch device is connected between the input terminal and the output terminal, and the switch device includes a control terminal and is configured to be switched between ON and OFF according to a switch controlling signal provided to the control terminal. The variable resistor is connected to the control terminal and configured to change to a first resistance while the switch device is ON, and to change to a second resistance while the switch device is OFF according to a resistor controlling signal. The first resistance is higher than the second resistance, and the resistor controlling signal is changed corresponding to the switch controlling signal.

Switch and multiplexer including the same

A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.

Si photodiode with symmetry layout and deep well bias in CMOS technology

Growing community of inventors

Taichung, Taiwan

Guan-Yu Chen