Stmicroelectronics (Crolles 2) Sas

Grégory Bidal

Raul Andres Bianchi

Laurent Favennec

Jean-Luc Huguenin

Markus Müller

An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench comprising an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the active area and the encapsulation layer comprising nitrogen or carbon.

Integrated circuit comprising an isolating trench and corresponding method

A method for manufacturing three types of MOS transistors in three regions of a same substrate, including the steps of: forming a first insulating layer, removing the first insulating layer from the first and second regions, forming a silicon oxide layer, depositing an insulating layer having a dielectric constant which is at least twice greater than that of silicon oxide, depositing a first conductive oxygen scavenging layer, removing the first conductive layer from the second and third regions, and annealing.

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Grenoble, France

Grégory Bidal