Sensor Electronic Technology, Inc.

Medical University of South Carolina

Grigory Simin

Michael Shur

Remigijus Gaska

Alexander Dobrinsky

Mikhail Gaevski

Maxim S Shatalov

Jinwei Yang

Qhalid Fareed

Vinod Adivarahan

Alexei Koudymov

M Asif Khan

Naveen Tipirneni

Yuriy Bilenko

Naveen Tipimeni

Remis Gaska

An optoelectronic device configured for improved light extraction through a region of the device other than the substrate is described. A group III nitride semiconductor layer of a first polarity is located on the substrate and an active region can be located on the group III nitride semiconductor layer. A group III nitride semiconductor layer of a second polarity, different from the first polarity, can located adjacent to the active region. A first contact can directly contact the group III nitride semiconductor layer of the first polarity and a second contact can directly contact the group III nitride semiconductor layer of the second polarity. Each of the first and second contacts can include a plurality of openings extending entirely there through and the first and second contacts can form a photonic crystal structure. Some or all of the group III nitride semiconductor layers can be located in nanostructures.

Light extraction from optoelectronic device

A mounting structure for mounting a set of optoelectronic devices is provided. A mounting structure for a set of optoelectronic devices can include: a body formed of an insulating material; and a heatsink element embedded within the body. A heatsink can be located adjacent to the mounting structure. The set of optoelectronic devices can be mounted on a side of the mounting structure opposite of the heatsink.

Optoelectronic device mounting structure with embedded heatsink element

A semiconductor heterostructure for an optoelectronic device includes a base semiconductor layer having one or more semiconductor heterostructure mesas located thereon. One or more of the mesas can include a set of active regions having multiple main peaks of radiative recombination at differing wavelengths. For example, a mesa can include two or more active regions, each of which has a different wavelength for the corresponding main peak of radiative recombination. The active regions can be configured to be operated simultaneously or can be capable of independent operation. A system can include one or more optoelectronic devices, each of which can be operated as an emitter or a detector.

Semiconductor heterostructure with multiple active regions

A heterostructure for use in an electronic or optoelectronic device is provided. The heterostructure includes one or more semiconductor layers containing columnar nanostructures (e.g., nanowires). The nanowire semiconductor layer can include sub-layers of varying composition, at least one of which is an active layer that can include quantum wells and barriers. A heterostructure can include n-type and p-type semiconductor contact layers adjacent to the nanowire semiconductor layer containing the active layer.

Optoelectronic device with a nanowire semiconductor layer

A contact for solid state light sources is described. The solid state light source can include an active region, such as a light emitting multiple quantum well, and a semiconductor layer, such as a p-type layer, from which carriers (e.g., holes) enter the active region. A contact can be located adjacent to the semiconductor layer and include a plurality of small area contacts extending only partially through the semiconductor layer. The plurality of small area contacts can have a characteristic lateral size at an interface between the small area contact and the semiconductor layer equal to or smaller than a characteristic depletion region width for the plurality of small area contacts.

Solid-state light source with small area contact

A solid-state light source with built-in access resistance modulation is described. The light source can include an active region configured to emit electromagnetic radiation during operation of the light source. The active region can be formed at a p-n junction of a p-type side with a p-type contact and a n-type side with a n-type contact. The light source includes a control electrode configured to modulate an access resistance of an access region located on the p-type side and/or an access resistance of an access region located on the n-type side of the active region. The solid-state light source can be implemented in a circuit, which includes a voltage source that supplies a modulation voltage to the control electrode to modulate the access resistance(s).

Access resistance modulated solid-state light source

An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.

Opto-electronic device with two-dimensional injection layers

A lateral/vertical device is provided. The device includes a device structure including a device channel having a lateral portion and a vertical portion. The lateral portion of the device channel can be located adjacent to a first surface of the device structure, and one or more contacts and/or a gate can be formed on the first surface. The device structure also includes a set of insulating layers located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface. An opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel. A contact to the vertical portion of the device channel can be located on the second surface.

Lateral/vertical semiconductor device with embedded isolator

A device including a first semiconductor layer and a contact to the first semiconductor layer is disclosed. An interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height and a characteristic width. The characteristic height can correspond to an average vertical distance between crests and adjacent valleys in the first roughness profile. The characteristic width can correspond to an average lateral distance between the crests and adjacent valleys in the first roughness profile.

Ultraviolet reflective rough adhesive contact

A switch includes an input contact and an output contact to a conducting channel. At least one of the input and output contacts is capacitively coupled to the conducting channel. A control contact is located outside of a region between the input and output contacts, and can be used to adjust the switch between on and off operating states. The switch can be implemented as a radio frequency switch in a circuit.

Gateless switch with capacitively-coupled contacts

A solid-state light source (SSLS) with an integrated electronic modulator is described. A device can include a SSLS having an active p-n junction region is formed within the SSLS for electron-hole pair recombination and light emission. the active p-n junction region can include a n-type semiconductor layer, a p-type semiconductor layer and a light generating structure formed there between. A pair of current supply electrodes can be formed to receive a drive current from a current supply source that drives the SSLS. A field-effect transistor (FET) modulator can be monolithically integrated with the SSLS for modulation thereof. The FET modulator can receive a modulation voltage from a modulation voltage source. The modulation voltage includes voltage pulses having a pulse amplitude and polarity to turn on and off current flowing through the FET modulator. These voltage pulses enable the FET modulator to control the drive current supplied to the SSLS.

Solid-state lighting source with integrated electronic modulator

A perforating ohmic contact to a semiconductor layer in a semiconductor structure is provided. The perforating ohmic contact can include a set of perforating elements, which can include a set of metal protrusions laterally penetrating the semiconductor layer(s). The perforating elements can be separated from one another by a characteristic length scale selected based on a sheet resistance of the semiconductor layer and a contact resistance per unit length of a metal of the perforating ohmic contact contacting the semiconductor layer. The structure can be annealed using a set of conditions configured to ensure formation of the set of metal protrusions.

Perforating contact to semiconductor layer

An integrated ultraviolet analyzer is described. The integrated ultraviolet analyzer can include one or more ultraviolet analyzer cells, each of which includes one or more ultraviolet photodetectors and one or more solid state light sources, which are monolithically integrated. The solid state light source can be operated to emit ultraviolet light, at least some of which passes through an analyzer active gap and irradiates a light sensing surface of the ultraviolet photodetector. A medium to be evaluated can be present in the analyzer active gap and affect the ultraviolet light as it passes there through, thereby altering an effect of the ultraviolet light on a ultraviolet photodetector.

Integrated ultraviolet analyzer

A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

Growing community of inventors

Columbia, SC, United States of America

Grigory Simin