International Business Machines Corporation

Lsi Corporation

Lsi Logic Corporation

Gregory Scott Winn

Mohammad Shafiul Mobin

Rick Allen Philpott

Matthew Tota

Anthony Richard Bonaccio

Raymond Alan Richetta

Donald Thomas McGrath

Scott C Savage

Leah Miller

Peter John Windler

Mehran Aliahmad

David Peter Swart

A signal generator circuit for reducing power consumption of out-of-band message communications between a first device including the signal generator circuit and a second device coupled to the first device comprises a switching circuit and a controller coupled to the switching circuit. The controller is operative to receive a reference clock signal and at least a first control signal indicative of a request for the first device to send a message to the second device when the first device is in a first mode of operation. The controller generates an output control signal and an output data signal. The output control signal is operative as a function of the first control signal to selectively power up the switching circuit and a transmitter driver during the first mode. The output data signal includes the message supplied to the transmitter driver for transmission to the second device during the first mode.

Methods and apparatus for low power out-of-band communications

In described embodiments, a transceiver supports two or more rates using an oversampling clock and data recovery (CDR) circuit sampling high rate data with a predetermined CDR sampling clock. A timing recovery circuit detects and accounts for extra or missing samples when oversampling lower rate data. An edge detector detects each actual data symbol edge and provides for an edge decision offset in a current instant's block of samples. An edge error is generated from the previous instant's actual and calculated edges; and an edge distance between actual edges of the current and previous instants is generated. Filtered edge distance and error are combined to generate a calculated edge position for the data symbol edge for the current instant. The edge decision offset is applied to the current calculated edge position to identify a sample value to generate a decision for the data symbol to detect the current data value.

Oversampled clock and data recovery with extended rate acquisition

A platform application specific integrated circuit (ASIC) including a base layer. The base layer generally comprises a predefined input/output (I/O) region and a predefined core region. The predefined input/output (I/O) region may comprise a plurality of pre-diffused regions disposed in the platform ASIC. The predefined core region may comprise one or more metal layers defining a plurality of power regions formed according to a custom design created after the base layer is fabricated. The base layer can be customized by depositing one or more metal layers.

Isolated power domain core regions in platform ASICs

The embodiments of the present invention are directed toward the design of routing patterns, including elements such as contacts, traces, and vias, for high speed differential signal pairs in integrated circuit package substrates.

High speed interface design

The present invention is a method, system, and product for testing operating characteristics of a continuous-time or discrete-time device under test, which is included within a circuit. The operating characteristics of the continuous-time or discrete-time device are tested utilizing electronic components that already exist within the circuit such that a test circuit is not utilized to test the device. The circuit includes a variable gain amplifier and an automatic gain correction (AGC) circuit. The operating characteristics of the device are tested utilizing the variable gain amplifier and said AGC circuit.

Automatic gain control (AGC) loop for characterizing continuous-time or discrete-time circuitry gain response across frequency

An apparatus and method for estimating an amplitude of a readback signal obtained from a data storage medium and input to a gain modifying amplifier involves sensing an amplifier output signal in response to a readback signal applied to the amplifier. An amplifier control signal is produced which is representative of a difference between the amplifier output signal and a reference signal. A compensation signal associated with a temperature coefficient of amplifier gain is generated, and an estimate signal indicative of the amplitude of the readback signal is produced using the compensation signal. The estimate signal is representative of readback signal amplitude when the estimate signal has a magnitude equivalent to that of the difference signal and a polarity opposite that of the difference signal. Generating the compensation signal may further involve generating a first compensation signal having a magnitude proportional to absolute temperature and generating a second compensation signal having a magnitude independent of temperature. The first and second compensation signals may be selectively used to cancel temperature related gain and polarity variations in the amplifier control signal. A circuit for estimating an amplitude of a readback signal includes a variable gain amplifier, a temperature compensation circuit, and a comparator, all of which have an equivalent temperature profile and are provided on a common IC substrate. The circuit, which further includes an N-bit DAC and a logic circuit, may be implemented in a disk drive system.

Variable gain amplifier with temperature compensation for use in a disk drive system

A method for measuring an amplitude of a readback signal obtained from a data storage medium involves transmitting the readback signal to a gain modifying amplifier, such as a variable gain amplifier (VGA), preferably provided in the read channel. A voltage signal associated with a loop gain of the amplification circuitry is sensed and compared with a number of control voltage signals, each of the control voltage signals being associated with a corresponding digital word value. The digital word value associated with a control voltage signal that is equal to the sensed voltage signal represents the relative amplitude of the readback signal. Gain characterization circuitry may further be combined with readback signal amplitude measuring circuitry, preferably in-situ a read channel, to obtain the absolute amplitude of a readback signal. Gain characteristics of the amplification circuitry are determined by applying reference voltage signals associated with corresponding pre-established gain values to the signal input of the gain modifying amplifier. A control voltage signal is selectively applied to the amplifier for each of the reference voltage signals until the amplifier output voltage signal is substantially equal to a pre-established reference voltage signal. Amplitude measurements may thereafter be taken to obtain the absolute amplitude of readback signals. Readback signal amplitude measurements may be performed when the read channel is in a read mode, idle mode, or servo mode of operation.

Method for measuring relative and absolute amplitudes of a signal read from a data storage medium

A circuit arrangement and method vary in response to temperature changes the signal swing of an input signal to an analog circuit which has a temperature-dependent effective linear signal range. A variable gain circuit varies the signal swing of the input signal in response to a control signal supplied thereto by a temperature control circuit so that the signal swing tracks changes in the effective linear signal range of the analog circuit. In this manner, signal to noise ratio may be optimized and distortion may be minimized over a range of operating temperatures for the analog circuit.

Circuit arrangement and method with temperature dependent signal swing

An improved method and apparatus are provided for dc offset trim adjustment of a variable gain amplifier. The VGA has predetermined overall gain endpoints. A minimum gain and a maximum gain are identified for the VGA in a preferred operational range. The identified minimum gain and the identified maximum gain for the VGA in the preferred operational range are spaced apart inwardly from the VGA predetermined overall gain endpoints. The minimum gain for the VGA in operation is set, then trim adjustment of the VGA is provided to minimize an output of the VGA. Then the maximum gain for the VGA in operation is set, then dc offset trim adjustment of the VGA is provided to minimize an output of the VGA.

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Fort Collins, CO, United States of America

Gregory Scott Winn