Trw Limited

Northrop Grumman Systems Corporation

Trw Northrop

Gregory S Caso

David A Wright

Vincent C Moretti

Dominic P Carrozza

Stuart T Linsky

Donald C Wilcoxson

Eldad Perahia

Reginald Jue

Scott Adam Stephens

Dennis A Nivens

Michael S Munoz

Sam H Liu

Edward L Niu

David G Klemes

The invention is a receiver and a method of receiving data having a preferred application in a satellite receiver in accordance with the invention includes a memory () including an addressable storage array which stores a sequence of data samples contained in a time division multiplexed signal from a plurality channels (X, Y and Z) and outputs the stored data samples in a sequence of data groups with each data group containing a plurality of samples from one of the plurality of channels; and a decoder (), responsive to the data groups, which decodes the data samples within the data groups and outputs decoded data samples.

Buffering and sequencing of soft decisions of multiple channels into a single shared biorthogonal decoder

A satellite based cellular communications system () for servicing multiple user terminals () is provided. The satellite based cellular communications system () includes at least one processing communications satellite () which supports communications uplinks () and communications downlinks () between multiple user terminals (). A network operations center () having a central control processor () communicates with the processing communication satellite () on the communications uplinks () and the communications downlinks (). The central control processor () minimizes intra-system interference between the multiple user terminals () by allocating a connection parameter to each user terminal () based upon accessing a plurality of communication system parameters.

Interference management of a processing communications satellite

The present invention provides a highly accurate synchronization method for a satellite communication system (). The system maintains a downlink symbol counter at an earth terminal and determines a downlink symbol count representative of the time of arrival of a burst transmitted from the earth terminal to a satellite (). The earth terminal adjusts the downlink symbol counter to correspond to the downlink symbol count () upon arrival of a predetermined reference point in a downlink frame. A timing error may initially be determined by launching an entry order wire from the earth terminal to the satellite (). The timing error may be transmitted to the earth terminal using a correction code which indicates the transmission is early, late, absent, or no change is required (). The terminal may make additional periodic timing adjustments based on the length of the propagation path between the earth terminal and the satellite (). The earth terminal may then precisely time the transmission of bursts from the earth terminal to the satellite (). The length of the propagation path and the timing error may be stored in the earth terminal so that the earth terminal may reenter the system without undertaking multiple commissioning processes.

Synchronization method for a processing communication satellite

A method and apparatus for mitigation of false co-channel uplink reception, also known as show-thru, in an uplink A due to an uplink B at a satellite receiver. The method includes storing multiple scrambling sequences associated with respective individual uplinks, including a scrambling sequence A, receiving uplink A signals at an uplink A receiver, applying scrambling sequence A to the uplink A signals to generate descrambled A data, and then decoding the descrambled A data. The decoding step includes the generation of a decoder failure signal in the event that decoding is unsuccessful, and the method discards the descrambled A data if the decoder failure signal is asserted. Therefore, any show-thru data derived from uplink B will be discarded in the uplink A receiver, and vice versa. The step of applying the scrambling sequence may be effected using an exclusive-or operation.

Mitigation of false co-channel uplink reception in a processing satellite communication system using scrambling sequences

A downlink orderwire integrator ( ) and separator ( ) for use in a processing satellite ( ) and a user terminal ( ) in a satellite based communications system ( ) is provided having a formatter ( ), a cell switch ( ) and a cell sieve ( ). The formatter ( ) generates orderwire cells ( ) with each orderwire cell ( ) having a header ( ) and a body ( ). The cell switch ( ) receives the orderwire cells ( ) from the formatter ( ) and traffic cells ( ) from at least one uplink ( ) and arranges the orderwire cells ( ) and the traffic cells ( ) in at least one frame ( ) to transmit on at least one downlink ( ). The frame ( ) includes a fixed custom frame portion ( ) and a fixed traffic portion ( ) that contains both the traffic cells ( ) and the orderwire cells ( ). The cell sieve ( ) receives at least one frame ( ) from the at least one downlink ( ) and separates the traffic cells ( ) and the orderwire cells ( ) from the traffic portion ( ), such that the formatter ( ) and cell switch ( ) are positioned within the processing satellite ( ) and the cell sieve ( ) is positioned within the user terminal ( ).

Downlink orderwire integrator and separator for use in a satellite based communications system

An apparatus ( ), and method, for calibrating gain in satellite uplink receiver electronics includes an uplink receiver, a measurement processor, and an attenuator ( ). The measurement processor receives the uplink signal from the uplink receiver and includes circuitry to sample ( ) the uplink signals during a blanking interval and outputs a gain calibration signal. The sampling circuitry ( ) may sample uplink signals periodically or responsive to extreme changes in conditions, and may sample the uplink signal multiple times during a blanking interval to output a multiple measurement sample. The measurement processor may include averaging circuitry ( ) to produce a sample average. The method and apparatus ( ) may both be used with TDMA systems.

Method of and apparatus for calibrating receive path gain

An initial entry processor ( ) for use in a processing satellite ( ) in a satellite based communications system ( ) is provided having a buffer ( ), a detection and timing circuit ( ) and an identity circuit ( ). The buffer ( ) stores an initial entry burst ( ) transmitted from at least one terrestrial terminal ( ) to the processing satellite ( ). The detection and timing circuit ( ) detects the initial entry burst ( ) and determines a time of arrival of the initial entry burst ( ) relative to an initial entry burst slot ( ). The identity circuit ( ) determines an identity of the terrestrial terminal ( ) that transmitted the initial entry burst ( ) such that the time of arrival is used by the identified terrestrial terminal ( ) during subsequent communications with the processing satellite ( ).

Onboard initial entry processor for facilitating a satellite communication

The invention is a receiver and a method of receiving data having a preferred application in a satellite. A receiver in accordance with the invention includes at least one memory ( ), each memory including an addressable storage array which stores a sequence of data samples contained in a time division multiplexed signal and outputs the stored data samples from a plurality of channels in a sequence of data groups with each data group containing a plurality of samples from one of the plurality of channels; and an outer decoder ( ), responsive to data blocks with each data block containing at least one data group, which decodes the data blocks and outputs decoded data blocks.

Serial to parallel conversion of data to facilitate sharing a single buffer among multiple channels

Communication satellite downlink transmitting and reception techniques includes circuitry which groups a predetermined number of data cells with a predetermined error correction code to generate frame bodies. The circuitry also groups the frame bodies with header symbols and trailer symbols to generate data frames. One or more modulators enable the placement of the modulated data frames into a plurality of frequency bands having a predetermined frequency range and a predetermined transmission rate. One or more antennas transmit the modulated data frames over one or more beams with different forms of polarization to other antennas. A demodulator is connected to demodulate the radio carrier signals and the beams into data frames from a plurality of frequency bands. Decoders are connected to decode the frame bodies with header symbols and with trailer symbols from the data frames and to decode four data cells as a group by using a predetermined error correction code.

Downlink transmission and reception techniques for a processing communication satellite

Uplink transmission and reception techniques for a processing satelliteation satellite

In a cellular satellite system such as Astrolink, where same frequency, same polarization (same &ldquo;color&rdquo;) signals are used in multiple ground cells, there exists the possibility of interference and false reception of uplink Synchronization Bursts (SB) in systems employing TDMA access of the frequency in question. In such systems, a SB transmitted from one terminal may be received in more than one satellite beam. The reception of the signal from a terminal in an undesired beam ( ) is erroneous and may adversely impact the time synchronization ( ) of the desired terminal. For example, a system may employ Maximal Length (ML) Pseudo-Noise (PN) sequences ( ) for its SBs wherein every beam may use the same sequence. To minimize false reception, the ML PN sequences ( ) of each SB may be cyclicly shifted a different amount for each beam to generate sequences ( ) having low corsscorrelation with each other. By choosing ML PN codes having low crosscorrelation ( ) for the different beams, the interference from undesired beams may be minimized ( ).

Mitigation of co-channel interference in synchronization bursts in a multi-beam communication system

An uplink demodulator system ( ) for use in a processing satellite ( ) in a satellite based communications system ( ) is provided with a first multiplexer ( ), a second multiplexer ( ), a multichannel preamble processor ( ), and a multichannel phase tracker ( ). The first multiplexer ( ) is operable to receive channelized data from a plurality of channelization modes at a plurality of inputs and operable to route the channelized data to a first output. The multichannel preamble processor ( ) is operable to determine a phase estimate for each channel of the channelized data. The multichannel phase tracker ( ) is operable to receive the phase estimates from the multichannel preamble processor ( ) and operable to track a phase for each channel of said channelized data to phase align each channel of said channelized data to corresponding uplink signals. The second multiplexer ( ) is operable to multiplex and route heavy encoded channelized data and light encoded channelized data to a second output where the multiplex channelized data is phase aligned with the corresponding uplink signals.

Uplink demodulator scheme for a processing satellite

A synchronization burst processor ( ) used in a processing satellite ( ) in a satellite based communications system ( ) is provided with a sync burst memory ( ), a first double correlator ( ), a second double correlator ( ) and a modulus module ( ). The sync burst memory ( ) stores at least one sync burst ( ) transmitted from a terrestrial terminal ( ) to the processing satellite ( ) where the sync burst ( ) is formed from a quadrature pair sample set &lcub;p, q&rcub;. The first double correlator ( ) performs an early correlation and a late correlation of the p samples relative to a sync burst slot ( ) to generate an early correlation Pe and a late correlation Pl. The second double correlator ( ) performs an early correlation and a late correlation of the q samples relative to the sync burst slot ( ) to generate an early correlation Qe and a late correlation Ql. The modulus module ( ) determines an early modulus Re and a late modulus Rl from the early correlations Pe and Qe and from the late correlations Pl and Ql. The early modulus Re and the late modulus Rl are used to determine if the sync burst ( ) is present in the sync burst slot ( ) and if the sync burst ( ) is early or late relative to the sync burst slot ( ).

Synchronization burst processor for a processing satellite

A method and system for controlling uplink power in a satellite communication system using error leveling is provided. The uplink power control system for a satellite communication system of a preferred embodiment of the present invention comprises a communication satellite ( ) and at least one UET ( ). The communication satellite ( ) includes an error detector ( ) and a comparator ( ). The UET ( ) includes a receiver ( ) for receiving an error indicator signal from the comparator ( ), and a power profile processor ( ) for controlling the transmit power level of the particular chanslot being used by the UET in response to the error indicator. A preferred method for controlling the transmit power level of a particular chanslot assigned to a UET in a satellite communication system in accordance with the present invention includes determining an error count for an uplink data signal received from the UET in the chanslot ( ), and comparing the error count to a predetermined error threshold ( ). The method further includes generating an error indicator signal for the chanslot in response to the comparison ( ), and controlling the transmit power level of the particular chanslot in response to the error indicator ( ).

Method and system for controlling uplink power in a satellite communication system using error leveling

The invention is a digital channelizer and a process for dividing an input bandwidth into at least some of N channels. A digital channelizer which divides an input bandwidth into at least some of N channels in accordance with the invention includes an analog to digital converter ( ); a demultiplexer ( ), coupled to the analog to digital converter, a window presum ( ) having N outputs, coupled to the parallel data streams, each output being a function of a window presum function and data words from a plurality of the parallel data streams; and a cyclic shift ( &prime;), coupled to I output groups of data words.

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Hermosa Beach, CA, United States of America

Gregory S Caso