General Electric Company

Ge Aviation Systems Limited

Gregory Reed Sykes

Michael Richard Durling

Scott Alan Stacey

Han Yu

Kit Yan Siu

Meng Li

Panagiotis Manolios

Andrew Walter Crapo

Timothy Lee Johnson

Luca Parolini

Christian Reynolds Decker

Liling Ren

Hongwei Liao

Terrell Michael Brace

Kevin Michael Jones

Troy Stephen Brown

Daniel Edward Russell

Jay Robert Pruiett

Alexander Walsch

Kevin John Jones

Baoluo Meng

Timothy D Skutt

Jay R Pruiett

Systems and techniques for memory event mitigation in redundant software installations are presented. A system can initiate an event executed by a first software application and a second software application that corresponds to the first software application. First data associated with the first software application can be stored in a first data store and second data associated with the second software application can be stored in a second data store. The system can also compare a first check value for the first data associated with the event and a second check value for the second data associated with the event. Furthermore, the system can re-initiate the event executed by the first software application and the second software application in response to a determination that the first check value does not correspond to the second check value.

Memory event mitigation in redundant software installations

According to some embodiments, an Arbitrary Software Logic Modeling ('ASLM') data source may store electronic records associated with units, each electronic record including a unit identifier, one or more identification tags, context data, unit parameters, unit variables, and internal logic. An ASLM platform may express system requirements at a logic block level and establish the logic blocks as self-contained entities and connections in accordance with the system requirements (the established logic blocks graphically representing systems logic). The ASLM platform may then explicitly transform the systems logic automatically to output language agnostic common design information exchange model information. The ASLM platform may also translate and maintain traceability among the system requirements, common design information exchange model information, and generated code.

Systems and methods for arbitrary software logic modeling

A method for model-based design of safety-critical software is disclosed. The method includes receiving natural-language software requirements, developing a specification model by implementing either semantic modeling or graphical modeling, applying formal requirements analysis to the specification model, auto generating requirements based and robustness test cases from the specification model, developing a design model based on the specification model, applying test cases to the design model, auto-generating source code using the design model, verifying the source code using both test cases and static analysis technology, and compiling executable object code from the verified source code. If a result of the analysis of the software specification or design models is not satisfactory then adjusting the specification or design model to correct any inconsistency, and repeating applying the analysis and test cases. A system for implementing the model-based design and a non-transitory computer readable medium are disclosed.

System and method for model based technology and process for safety-critical software development

A computer-implemented system for generating test cases and/or test procedures to verify software having a nonlinear arithmetic constraint over a Real number range. The system includes a translator that receives, as input, software specification models for the software to be verified. The translator is configured to generate, as output, a plurality of SMT formulas that are semantically equivalent to the software specification models. The system includes an analytical engine pool that receives, as input, the plurality of SMT formulas from the translator and analyzes the plurality of SMT formulas, and generates, as output, test case data for each of the plurality of SMT formulas determined to be satisfiable. The system includes a post-processor that receives, as input, the test case data from the analytical engine pool and generates, as output, the test cases and/or test procedures for the software to be verified based on the test case data.

System and method for test generation from software specification models that contain nonlinear arithmetic constraints over real number ranges

A system and method of multi-level scheduling analysis for a general processing module of a real-time operating system. The method includes identifying any processes within respective partitions of the general processing module, for each identified process, determining if the process is local-time centric or global-time centric. The method converts global-time centric process to a local-time centric process, applies a single-level scheduling analysis technique to the processes of respective partitions, and transforms local-time based response times to global-time based response times. The method performs scheduling and response time analyses on one or more of the identified processes of respective partitions. The method can be performed on a synchronous and/or asynchronous system, and on a hierarchical scheduling system that includes a top level scheduler having a static-cyclic schedule and/or a general static schedule. A system and non-transitory computer-readable medium are also disclosed.

System and method for multi-level real-time scheduling analyses

A mechanism and method for accessing data in a shared memory by at least one client, includes an allocation of data in the shared memory, the memory configured in a plurality of buffers, and accessing the data by a client or a server without locking or restricting access to the data.

Mechanism and method for accessing data in a shared memory

A method of providing high integrity checking for an N-lane computer processing module (Module), N being an integer greater than equal to two. The method comprises the steps of: detecting, by a data Output Management unit (OM), when any of the N processing lanes sends different output data; configuring each Hosted Application as either normal or high integrity; for the Hosted Applications configured as high integrity, running an identical version of the software source code targeted for similar or dissimilar microprocessors on all N processing lanes, and activating a Time Management Unit, Critical Regions Management Unit, data Input Management Unit and data Output Management Unit for each of the N processing lanes; and for the Hosted Applications configured as normal integrity, running a copy of the software on one of the N processing lanes, and not activating the Time Management Unit, Critical Regions Management Unit, Input Management Unit and Output Management Unit for the one activated processing lane while that Hosted Application is running.

Method for high integrity and high availability computer processing

Growing community of inventors

Caledonia, MI, United States of America

Gregory Reed Sykes