Lsi Logic Corporation

Lsi Corporation

Gregory Pierce

Juergen K Lahner

Randall P Fry

Balamurugan Balasubramanian

Kavitha Chaturvedula

Srinivas Adusumalli

Kiran Atmakuri

Krishna Devineni

A method and computer program product for associating timing violations with critical structures in an integrated circuit design include steps of: (a) receiving as input an integrated circuit design; (b) identifying a critical structure in the integrated circuit design; and (c) generating as output a script for a static timing analysis tool that includes a timing check for a path having a start point at an input of the critical structure and an end point at an output of the critical structure.

Method of associating timing violations with critical structures in an integrated circuit design

A method of automatically analyzing RTL code includes receiving as input RTL code for an integrated circuit design. An RTL platform is selected that incorporates design rules for a vendor of the integrated circuit design. The design rules are displayed from the RTL platform on a graphic user interface. A number of the design rules are selected from the graphic user interface. An analysis is performed in the RTL platform of the RTL code for each of the selected design rules. A result of the analysis is generated as output for each of the selected design rules.

Automated analysis of RTL code containing ASIC vendor rules

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Ashby, MA, United States of America

Gregory Pierce