Motorola Corporation

Gregory P Wilson

Thomas J Walczak

Jeffery L Mullins

Bryan A Potratz

Dale Gerard Schwent

John C Johnson

Rashid M Osmani

Patrick J Marry

Donald B Lemersal, Jr

Michael W Houghton

Mark E Prill

Rodney E Haarala

Charles L Sherman

A transmitter (604) of a TDMA cellular telephone (600) includes power control circuitry (100) comprised of variable gain stage (104), mixer (106), bandpass filter (109), RF amplifier (110), and directional coupler (112) in a forward path, and two detectors (116 and 117), four A/D converters (118, 119, 121 and 123), digital controller (120), and D/A converter (126) in a feedback path. In operation, the variable gain stage (104) is responsive to a gain control signal AOCCNT (128) for adjusting a modulated IF signal, which is then mixed in mixer (106) with an RF reference signal to produce the transmit RF signal. The temperature and supply voltage are sampled by controller (120) at the beginning of each time slot. Adjustments in the gain control signal (128) dictated by the sampled temperature and supply voltage are made by controller (120) in each time slot prior to keying the RF amplifier (110). The transmit RF signal is amplified by the RF amplifier (110) to produce the transmit output signal which is coupled by the directional coupler (112) and transmit filter (618) to an antenna (620) for transmission. The forward power and reverse power of the transmit output signal are sampled by controller (120) at the end of each time slot. The sampled forward power is used by controller (120) in calculating the value of the gain control signal for the next time slot. If the sampled reverse power or supply voltage exceed respective maximum values, the RF amplifier (110) is dekeyed by controller (120).

Power control circuitry for a TDMA radio frequency transmitter

A multiplexed synchronous/asynchronous data bus is disclosed in which three bus lines are used to convey bidirectional synchronous data between at least two data devices at a relatively low data rate. Valid half duplex asynchronous data is applied at a higher data transfer rate to one of the three bus lines when only one of the bus lines is held in a logic high state.

Multiplexed synchronous/asynchronous data bus

A multiplexed synchronous/asynchronous data bus is disclosed in which three bus lines are used to convey bidirectional synchronous data between at least two data devices at a relatively low data rate. Half duplex asynchronous data is applied at a higher data transfer rate to one of the three bus lines when another of the bus lines is held in a logic high state.

An analog frequency inversion scrambler employing an exchange of random number seeds between an originating scrambler and an answering scrambler to create two pseudo-random frequency hopping rolling codes has been disclosed. The rolling code used in one direction of a duplex channel is different than the rolling code in the opposite direction and each code is synchronized by periodic synchronization signals.

Duplex analog scrambler

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Lake Zurich, IL, United States of America

Gregory P Wilson