Sharp Laboratories of America, Inc

Gregory M Stecker

Sheng Teng Hsu

Fengyan Zhang

Robert A Barrowcliff

John F Conley, Jr

Lisa Stecker

Jong-Jan Lee

Wei-Wei Zhuang

Yoshi Ono

Yuhao Lu

Sean Vail

A battery is provided with an associated method for transporting metal-ions in the battery using a low temperature molten salt (LTMS). The battery comprises an anode, a cathode formed from a LTMS having a liquid phase at a temperature of less than 150&#xb0; C., a current collector submerged in the LTMS, and a metal-ion permeable separator interposed between the LTMS and the anode. The method transports metal-ions from the separator to the current collector in response to the LTMS acting simultaneously as a cathode and an electrolyte. More explicitly, metal-ions are transported from the separator to the current collector by creating a liquid flow of LTMS interacting with the current collector and separator.

Battery with low temperature molten salt (LTMS) cathode

An electroluminescence (EL) device and a method are provided for fabricating said device with a nanotip electrode. The method comprises: forming a bottom electrode with nanotips; forming a Si phosphor layer adjacent the nanotips; and, forming a transparent top electrode. The Si phosphor layer is interposed between the bottom and top electrodes. The nanotips may have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. Typically, the nanotips are formed from iridium oxide (IrOx) nanotips. A MOCVD process forms the Ir bottom electrode. The IrOx nanotips are grown from the Ir. In one aspect, the Si phosphor layer is a SRSO layer. In response to an SRSO annealing step, nanocrystalline SRSO is formed with nanocrystals having a size in the range of 1 to 10 nm.

Nanotip electrode electroluminescence device

A method of forming a layer of high-k dielectric material in an integrated circuit includes preparing a silicon substrate; forming a high-k dielectric layer by a sequence of ALD cycles including: depositing a first layer of metal ligand using ALD with an oxygen-containing first precursor; and depositing a second layer of metal ligand using ALD with a second precursor; repeating the sequence of ALD cycles N times until a near-critical thickness of metal oxide is formed; annealing the substrate and metal oxide layers every N ALD cycles in an elevated temperature anneal; repeating the sequence of ALD cycles and elevated temperature anneals until a high-k dielectric layer of desired thickness is formed; annealing the substrate and the metal oxide layers in a final annealing step; and completing the integrated circuit.

Modulated temperature method of atomic layer deposition (ALD) of high dielectric constant films

Silicon phosphor electroluminescence device with nanotip electrode

A non-volatile memory resistor cell with a nanotip electrode, and corresponding fabrication method are provided. The method comprises: forming a first electrode with nanotips; forming a memory resistor material adjacent the nanotips; and, forming a second electrode adjacent the memory resistor material, where the memory resistor material is interposed between the first and second electrodes. Typically, the nanotips are iridium oxide (IrOx) and have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. In one aspect, the substrate material can be silicon, silicon oxide, silicon nitride, or a noble metal. A metalorganic chemical vapor deposition (MOCVD) process is used to deposit Ir. The IrOx nanotips are grown from the deposited Ir.

Non-volatile memory resistor cell with nanotip electrode

Zinc-oxide nanostructures are formed by forming a pattern on a surface of a substrate. A catalyst metal, such as nickel, is formed on the surface of the substrate. Growth of at least one zinc oxide nanostructure is induced on the catalyst metal substantially over the pattern on the surface of the substrate based on a vapor-liquid-solid technique. In one exemplary embodiment, inducing the growth of at least one zinc-oxide nanostructure induces growth of each zinc-oxide nanostructure substantially over a patterned polysilicon layer. In another exemplary embodiment, when growth of at least one zinc-oxide nanostructure is induced, each zinc-oxide nanostructure grows substantially over an etched silicon substrate layer.

Selective deposition of ZnO nanostructures on a silicon substrate using a nickel catalyst and either patterned polysilicon or silicon surface modification

A method is provided for forming iridium oxide (IrOx) nanotubes. The method comprises: providing a substrate; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; introducing oxygen as a precursor reaction gas; establishing a final pressure in the range of 1 to 50 Torr; establishing a substrate, or chamber temperature in the range of 200 to 500 degrees C.; and using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx hollow nanotubes from the substrate surface. Typically, the (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor is initially heated in an ampule to a first temperature in the range of 60 to 90 degrees C., and the first temperature is maintained in the transport line introducing the precursor. The precursor may be mixed with an inert carrier gas such as Ar, or the oxygen precursor reaction gas may be used as the carrier.

Iridium oxide nanotubes and method for forming same

A PrCaMnO(PCMO) spin-coat deposition method for eliminating voids is provided, along with a void-free PCMO film structure. The method comprises: forming a substrate, including a noble metal, with a surface; forming a feature, such as a via or trench, normal with respect to the substrate surface; spin-coating the substrate with acetic acid; spin-coating the substrate with a first, low concentration of PCMO solution; spin-coating the substrate with a second concentration of PCMO solution, having a greater concentration of PCMO than the first concentration; baking and RTA annealing (repeated one to five times); post-annealing; and, forming a PCMO film with a void-free interface between the PCMO film and the underlying substrate surface. The first concentration of PCMO solution has a PCMO concentration in the range of 0.01 to 0.1 moles (M). The second concentration of PCMO solution has a PCMO concentration in the range of 0.2 to 0.5 M.

PCMO spin-coat deposition

A method is provided for patterning iridium oxide (IrOx) nanostructures. The method comprises: forming a substrate first region adjacent a second region; growing IrOx nanostructures from a continuous IrOx film overlying the first region; simultaneously growing IrOx nanostructures from a non-continuous IrOx film overlying the second region; selectively etching areas of the second region exposed by the non-continuous IrOx film; and, lifting off the IrOx nanostructures overlying the second region. Typically, the first region is formed from a first material and the second region from a second material, different than the first material. For example, the first material can be a refractory metal, or refractory metal oxide. The second material can be SiOx. The step of selectively etching areas of the second region exposed by the non-continuous IrOx film includes exposing the substrate to an etchant that is more reactive with the second material than the IrOx.

Growing community of inventors

Vancouver, WA, United States of America

Gregory M Stecker