Marvell Israel (misl) Ltd.

Gregory Kovishaner

Yakov Tokar

Lior Moheban

Alex Pinskiy

Ronen Goldberg

Implementations described herein provide apparatus and methods for storing data in, and retrieving data from, storage buffer having an odd number of storage locations using minimal additional logic. A binary address symbol with a maximum value of one less than twice the number of storage locations is used to allow use of Gray code in transferring the storage location pointers between clock domains. An offset value is added to the binary address symbol to further facilitate use of Gray code. The Gray code is converted back to a binary symbol at the read side, the offset value is subtracted therefrom, and a pointer to a particular storage location is resolved.

Managing addresses in a network device with a register-based buffer having an odd number of storage locations

Implementations described herein provide apparatus and methods for storing data in, and retrieving data from, an asynchronous FIFO. Data is received at a write side receiving circuitry residing in a write-side clock domain of the FIFO and stored at a memory location in a data storage buffer having a plurality of locations. Each memory location in the data storage buffer has a binary pointer value corresponding to the respective location. The binary pointer value is converted to a corresponding Gray code symbol and transferred to the read side of the FIFO. At the read side the Gray code symbol is converted back to the corresponding binary pointer value. Read-side control circuitry, using the binary pointer value, transfers the data from the data storage buffer to a data output register residing in a read-side clock domain of the FIFO.

Register-based asynchronous FIFO with asymmetric size

Embodiments described herein provide a dual-line FIFO structure without the use of any multiplexer. Instead, the dual-line FIFO described herein uses a selectively transparent latch and a flip-flop serially connected to the latch, such that the combination of the serially connected latch and the flip-flop can temporarily store up to two data units at two clock cycles.

Systems and methods for transferring data with a dual-line first-in-first-out (FIFO) memory array

Apparatuses and methods for modifying data stored on a disk are provided. A buffer comprises a FIFO queue. The FIFO queue includes a plurality of buffer lines for queuing data units in a predetermined order. A controller is configured to write data units from the disk to respective buffer lines of the FIFO queue. The controller is further configured to perform read-modify-write (RMW) operations to modify the data units written to the queue. Each RMW operation includes (i) popping a data unit from a buffer line of the queue based on a location of a read pointer, (ii) performing a mathematical or logic operation to modify the data unit that is popped from the queue, and (iii) pushing the modified data unit into the queue. The modified data unit is written to a buffer line of the queue based on a location of a write pointer.

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Ramat Gan, Israel

Gregory Kovishaner