Unisys Corporation

Burroughs, Inc.

Gregory K Deal

Joseph A Hassler

Stephen F Heil

Timothy A Koss

Mark W Jennion

Richard J Manco

Oleg Rodionov

Maureen P Connell

J Troy Stepan

David S Milowicki

Chris E Limson

A guest disk may be setup through the assistance of a restore environment. A restore environment may be bundled with partitioning software, and the restore environment may be a small, lightweight Linux&#x2122; environment that is operating-system agnostic. The restore environment allows any operating system image file to be deployed on the guest disk. The guest disk may be created through the use of virtualization software and a guest operating system.

Technique for deploying operating systems in a virtualized environment

A system of determining oscillation frequency of a ring oscillator formed on a chip. The system includes a ring oscillator formed on the chip for providing a ring clock signal having first periodic pulses, and a ring counter formed on the chip for providing a ring clock count value in response to the first periodic pulses. The system also includes a terminal for receiving a system clock signal having second periodic pulses, and a system counter formed on the chip for providing a system clock count value in response to the second periodic pulses. The oscillation frequency of the ring oscillator is determined based on the ring clock count value and the system clock count value.

System and method of determining ring oscillator speed

A method for evaluating a system of interconnected electronic components is disclosed. According to the method, a library element model is generated for each electronic component in the system, in a format that can be input into an ASIC evaluation tool. A system netlist that represents the electronic components and the interconnections between them is generated, also in a format that can be input into an ASIC evaluation tool. The library element models and the system netlist are input into the ASIC evaluation tool, which is used to evaluate the system.

Methods for evaluating systems of electronic components

A two-way set associative cache memory system for a parallel-pipelined computer system uses separate queue structures to hold main memory fetch and store requests generated by the central processing unit (CPU). A memory access unit, coupled between the cache memory system and the CPU selects the next request to be processed by the main memory from between the requests at the heads of the fetch and store queues. The request at the head of the fetch queue is preferred over the request at the head of the store queue unless the memory partition to be used by the fetch request is still busy with a previous request while the partition to be used by the store request is idle. Data retrieved from the main memory replaces data in the cache according to an algorithm that prefers empty pages within a set to pages that contain data and prefers pages that do not have pending update requests scheduled to pages that do have pending update requests scheduled. In the event that only pages having pending update requests are found, input requests to the cache are inhibited until at least one fetch request for a page in the set is completed and the page is no longer marked as having a pending update request.

Method and apparatus for cache memory access with separate fetch and

An address environment storage unit for a stack-oriented data processor for operating in data sets arranged as structured blocks, or nested pushdown stacks. The address environment storage employs a plurality of sets of display registers such that the current set of display registers does not have to be updated each time the processor moves to a different area of data in memory. The programmer only needs to provide a designation of a lexical level in a particular stack and the offset value from the base of the particular activation record in that stack for addition to obtain actual memory address. When the processor executes a procedure enter operator that calls for a new section of memory in which to operate, a display pointer is changed to point to the set of display registers provided for accessing that new area of memory.

Addressing environment storage for accessing a stack-oriented memory

A multi-purpose register formed of various cells of a customized integrated circuit gate array chip having input gate cells, multiplexor cells, flip-flop cells and output gate cells. The flip-flop cells may be segmented into registers of different widths or may be employed as individual flip-flop cells depending upon the mode in which the register array is to be employed.

Growing community of inventors

West Chester, PA, United States of America

Gregory K Deal