International Business Machines Corporation

Gregory J Dick

Abigail S Ganong

James Allan Bruce

John George Hartley

John W Pavick

Scott Marshall Mansfield

Ioana C Graur

Jacek G Smolinski

Joseph B Frei

Virginia M Chung

Denise M Puisto

Donald P Perley

Edward J Stashluk, Jr

Solutions for verifying photomask designs are disclosed. In one embodiment, a method of verifying a photomask design includes: simulating an initial semiconductor manufacturing process using a plurality of mask shapes and variation models for the initial semiconductor manufacturing process, to generate a plurality of contours for the initial semiconductor manufacturing process; simulating a subsequent semiconductor manufacturing process using the contours for the initial semiconductor manufacturing process and variation models for the subsequent semiconductor manufacturing process, to generate a plurality of contours for the subsequent semiconductor manufacturing process; repeatedly simulating at least one further subsequent semiconductor manufacturing process using a plurality of contours for the subsequent semiconductor manufacturing process and variation models for the further subsequent semiconductor manufacturing process; and generating and storing a verification result for the photomask design on a computer readable storage medium.

Photomask design verification

A method of designing and forming a mask used for projecting an image of an integrated circuit design. After providing a mask element corresponding to a portion of a design of an integrated circuit layout, the method includes correcting the mask element using OPC techniques, and fracturing the OPC-corrected mask element into a plurality of polygonal segments. The method then includes identifying along an edge of the mask element a polygon edge having a thickness less than that which can be normally reproduced by a mask writer, and modifying configuration of the identified mask element segment to add or subtract length to an end of the polygon to create a corrected mask element having increased resolution by the mask writer. The method then includes using an electron beam or other mask writer to form a mask having the mask element with modified configuration.

Method for optimization of optical proximity correction

A method is provided for performing optical proximity correction ('OPC') verification in which features of concern of a photomask are identified using data relating to shapes of the photomask, an aerial image to be obtained using the photomask, or a photoresist image to be obtained in a photoimageable layer using the photomask. A plurality of areas of the photomask, aerial image or photoresist image are identified which incorporate the identified features of concern, where the plurality of identified areas occupy substantially less area than the total area of the photomask that is occupied by features. Enhanced OPC verification limited to the plurality of identified areas is then performed to identify problems of at least one of the photomask, aerial image or photoresist image.

OPC verification using auto-windowed regions

A method, and a system for employing the method, for compacting the amount of memory required to store a two dimensional array of exposure spot shapes in a numerically controlled (NC) electron beam lithography tool. The method includes the steps of: sorting the shapes in a selected line based on the widths and heights of the shapes; identifying and removing from contention a group of shapes in the selected line having common widths and heights; determining a dosage requirement for the shapes in the group; and applying one or more commands based on the group and the determined dosed requirement to enable the NC electron beam lithography tool to draw the two dimensional array of exposure spot shapes. Before the sorting step, the method can include initially selecting whether processing for the shapes is performed on a vertical line or on a horizontal line basis; and applying the sorting step, the identifying step, the determining step and the applying step on a basis not selected in the initially selecting step. The method can also include the steps of: preselecting a minimum number of required common shapes; and performing the identifying and removing step only if the number of shapes in the group equals or exceeds the minimum number.

Automatic generation of one dimensional data compaction commands for electron beam lithography

An e-beam system for making masks corrects the beam for pattern-dependent errors by executing the bulk of the post-processing program only once, with two sets of output data being generated by the encode routine. A first output file of the encode routine generates the beam control data without pattern-dependent corrections. A second output file merges the beam control data with the data for metrology marks. A test wafer is patterned using the second output file and measured to generate a set of pattern correction data. Production wafers are written using the beam control data corrected on the fly by the pattern correction data.

Correction of pattern-dependent errors in a particle beam lithography system

A system and method of converting large Integrated Circuit (IC) designs into patterns. First, based on shape density, the design is fragmented into pieces, each piece including roughly the same number of shapes. Next, a band of shapes, all within the proximity correction area for each piece, are identified. Each piece, including its identified band, is processed individually to convert data within the piece and within the proximity correction band to Numerical Control (NC) data. The NC data for the proximity correction band is discarded. The piece's NC data is stored as an NC data file for the piece. This is repeated until all of the pieces are converted to NC data. Finally, the pattern is written, one piece at a time.

Piece-wise processing of very large semiconductor designs

A technique allows for processing all the original cells of an integrated circuit design without any partial unnesting. In the first step, each nested cell is framed by a bounding box or polygon which contains all the shapes in the cell. In the second step, an overlap removal is performed on the frames. In the third step, for each cell, the shapes within the original frame and any other shapes intruding on the overlap removed frame are retrieved. In the fourth step, overlap removal (or union) is performed on the shapes retrieved in the third step. The overlap removed frame will clip off any pieces outside. Union will integrate any non-original shapes into the cell. After the third and fourth steps have been performed for all cells, the modified cells will contain all the original shape information and are independent.

Nested overlap removal for physical design data using frames

A more efficient method of macro placement and graying for electron beam (e-beam) lithography. The e-beam field is divided into smaller subfields. Repetitious shapes or collections of shapes which are repetitious are represented by macros. Some shapes span or are intersected by subfield boundaries. After the shapes are converted to fill rectangles and the fill rectangles are proximity corrected, the macro containing the proximity corrected fill rectangles is grayed and placed without being unnested. First, the Macro Organization Step, the macro's fill rectangles are sorted. Tall-narrow macros are sorted top to bottom then left to right, short-wide macros are sorted left to right then top to bottom. After the sort, chains of rectangles are created and a shadow is generated for the macro and for each chain. Next, the Macro Placement and Graying Step, a determination is made of whether and where macro graying will be required. The macro shadow is transformed into subfield coordinates and a determination is made of whether the transformed shadow intersects with (spans) a subfield boundary. If the macro's shadow touches more than one subfield (spans a subfield boundary), then the macro's chain shadows are examined to determine if any chain spans the boundary. Graying is done on any spanning chain. Gray-spliced rectangles and single rectangles are placed in the pattern buffer. Partial macro read commands are placed in the pattern buffer for chains or partial chains resulting from gray-splicing.

Electron beam exposure method

A system and method for exposing a radiation sensitive layer to one or more repetitious design cells. Each design cell includes at least one design shape on at least one buildlevel. Each shape represents a circuit shape, or part of a circuit shape on an integrated circuit layer in a circuit on an integrated circuit chip. For each buildlevel: the design is parceled into units that contain approximately the same optimum number of vertices; and for each parcel: Each design cell occurrence, or transform, is examined to determine whether it has proximity effect commonality with other cell transforms (a common environment) and, based on that determination, the cell transform is placed into one of three groups, Macro Candidates, Nested Candidates, and Unnested Candidates. In each Macro Candidate and Nested Candidate any overlapping shapes are combined, or unioned, to form a single shape and, then, the shapes are reconstructed (filled) with rectangles (fill rectangles). Each Macro Candidate design cell is proximity corrected for forward and backward scattering, and the result is placed in a Macro Buffer. Each Nested Candidate design cell is proximity corrected for forward scattering. Nested Candidates are unnested and merged with the Unnested Candidates. The unnested shapes are proximity corrected, former Nested Candidates are proximity corrected for backward scattering and former Unnested Candidates are proximity Corrected for forward and backward scattering. The proximity corrected unnested shapes are stored in a pattern buffer. Finally, the proximity corrected shapes are passed from the pattern buffer and the macro buffer to an electron beam (E-beam) tool as Numerical Control (NC) data.

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Gregory J Dick