Microsoft Technology Licensing, LLC

Gregory George Williams

Harjit Singh

Wei Guo

Michael G Love

Ankur Varma

Mitchell Stephen Dernis

Stephen Z Au

Jeremy Braun

Eiko Junus

Kent W Ng

An extension to the Universal Serial Bus (USB) protocol that utilizes reserved bits in the OHCI Endpoint Descriptors to signal which root hub port(s) should transmit the data. Typically, all ports transmit (broadcast) data. The present invention encodes transmission information that can be used by the hardware to effectively control which port(s) need to be tri-stated. However, by setting, the 'on' bits for all the ports, the present invention retains standard USB functionality. Also provided is a method to increase the bandwidth of low speed devices connected to the USB bus by increasing the data payload for such devices.

Extended USB protocol with selective broadcast mechanism

A memory controller is utilized to overcome NAND flash memory's propensity for comprising bad blocks of memory. The memory controller utilizes minimal hardware and is essentially transparent to a device requesting access to the NAND memory. A NAND flash memory device is configured to comprise a set of main blocks of memory and a set of auxiliary blocks of memory. Each block is divided into pages of memory and each page includes metadata. The metadata includes a block status indicator, indicating whether a block is good or bad. When receiving a request to access a page in the NAND flash memory, if the block in which the page resides is good, that block is accessed. If the block is bad, auxiliary memory is searched until a block containing the address of the bad block in its metadata is found. The found block is accessed in lieu of the bad block.

NAND flash memory management

Detecting a connection between two circuits utilizing a high-speed interface. Interface circuitry internal to a computing device performs an initialization process between two processors automatically to determine the state of the interface connection. Test circuitry retrieves the interface state from the interface circuitry. Neither the configuration process, the interface circuitry or the test circuitry require full functionality of an IC on which they reside in order to operate.

Design for test for a high speed serial interface

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Menlo Park, CA, United States of America

Gregory George Williams