Supercomputer Systems Limited Partnership

Cray Research, Inc.

Silicon Graphics, Incorporated

Gregory G Gaertner

Diane M Wengelski

George A Spix

Keith J Thompson

Robert E Strout, Ii

Jon A Masamitsu

David M Cox

Richard E Hessel

Don A Van Dyke

Steve S Chen

James C Rasbold

David A Seberger

Kelly T O'Hair

Timothy J Cramer

Ashok Chandramouli

Linda J O'Gara

Jeremiah D Burke

Mark D Johnson

Giacomo G Brussino

Stuart W Hawkinson

Steven G Oslon

David M Barkai

Andrew E Phelps

Alexander A Silbey

Edward C Miller

Anthony R Schooler

Brian D Vanderwarn

An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.

Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes

A method of providing fast and efficient kernel functions including those usually performed by kernel daemons and other kernel processes such as those which service interrupts. The method consists of using minimal-context processes that carry only the system-related information needed to do the work they are created to do. Compared to the full-context processes presently used to do kernel functions, minimal-context processes are created quickly and switch economically. If associated with a work queue, the minimal-context process performs a series of tasks within a single active session. If no queue is used, a minimal-context process can wake up and accomplish a single task rapidly. The method generally relates to kernel-based operating systems.

Responding to service requests using minimal system-side context in a

On a tightly coupled multiprocessor computer system, the multiple parallel regions of a multithreaded applications program can execute simultaneously as multiple threads on a plurality of processors. Furthermore, a plurality of multithreaded programs may run simultaneously. The current invention uses an efficient system to schedule and reschedule processors to run these multiple threads. Scheduling is integrated at two levels: at the first level, processors are assigned processes. At the next level, processes are assigned threads. Increased efficiency is achieved by this integration and also by the formation of processes with destructible context. It makes use of shared storage to indicate the process request level and the control state for each parallel region.

Dual level scheduling of processes to multiple parallel regions of a

Communication among processors having differing operating speeds by providing wake queues in which slower processors can queue entries, access to which by multiple concurrent producers and multiple concurrent consumers is synchronized or controlled using global registers. When a faster processor executes a kernel process for handling a wake queue, an entry is fetched from the wake queue and information stored in the entry is used to process the entry.

System for communicating among processors having different speeds

A fast interrupt mechanism is capable of simultaneously interrupting a community of associated processors in a multiprocessor system. The fast interrupt mechanism enables the more effective debugging of software executing on a multiprocessor system by allowing all of the processors in a community associated with a parallel process to be halted within a limited number of clock cycles following a hardware exception or processor breakpoint. The fast interrupt mechanism consists of a set of registers that are used to identify associations among multiple processors, a comparison matrix that is used to select processors to be interrupted, a network of interconnections that transmit interrupt events to and from the processors, and elements in the processors that create and respond to fast interrupt events.

Fast interrupt mechanism for interrupting processors in parallel in a

System and method for controlling a highly parallel multiprocessor using

The present invention provides a parallel memory scheduler for execution on a high speed highly parallel multiprocessor architecture. The operating system software provides intelligence and efficiency in swapping out process images to facilitate swapping in another process. The splitting and coalescing of data segments are used to fit segments in to current free memory even though a single contiguous space of sufficient size does not exist. Mapping these splits through data control register sets retains the user's contiguous view of the address space. The existence of dual images and partial swapping allows efficient, high speed swapping. Candidates for swap out are chosen in an intelligent fashion, selecting only those candidates which will most efficiently aLlow the swapin of another process.

Method for efficient non-virtual main memory management

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Eau Claire, WI, United States of America

Gregory G Gaertner