Texas Instruments Corporation

Powerwave Cognition, Inc.

Gregory Copeland

Roland Sperlich

Fernando Alberto Mujica

Scott Y Seidel

Rajesh Kumar Mishra

Murtaza Ali

Zigang Yang

Milind Anil Borkar

Ludger Schlicht

Peter Atwal

Victor M T Pataca

Jeffrey E Smith

An apparatus and system are provided for crest factor reduction (CFR). Preferably, a peak from the wideband signal is detected. A gain from the magnitude of the peak and a threshold can then be calculated. Based on this information, each carrier's contribution to the peak can be approximated, and a cancellation pulse coefficient for each carrier from its contribution to the peak can be calculated. A base cancellation pulse can be calculated from the cancellation pulse coefficients for each carrier, and a cancellation pulse can be calculated from the base cancellation pulse and the gain, which can then be applied to the wideband signal.

Method and system for crest factor reduction

Methods and systems are disclosed herein for synchronizing network time in a mobile ad-hoc network (MANET). Each node in the MANET may be synchronized with all of its neighbors for effective communications. More specifically, a local timing reference may be adjusted according to measured errors in incoming control packets so that time slotted transmissions can be scheduled without collisions with other nodes. The method and system is a low overhead protocol that only requires a small amount of data attached to each scheduled transmission avoiding the requirement for separate messaging. This may reduce the overhead of maintaining the MANET providing additional efficiency and robustness.

Synchronization of time in a mobile ad-hoc network

In embodiments of the present invention improved capabilities are described for a mobile broadband routable internet (MBRI) providing for carrier-grade, networked, broadband, IP-routable communication among a plurality of mobile devices, where the mobile devices may represent a plurality of nodes that are linked together through a mobile ad-hoc network (MANET). Mobile devices may operate as peers in a peer-to-peer network, with full IP routing capabilities enabled within each mobile device, thereby allowing routing of IP-based traffic, including deployment of applications, to the mobile device without need for infrastructure conventionally required for mobile ad hoc networks, such as cellular telephony infrastructure. Full IP-routing to mobile devices may allow seamless integration to the fixed Internet, such as through fixed or mobile access points, such as for backhaul purposes. Thus, the MBRI may function as a standalone mobile Internet, without connection to the fixed Internet, or as an IP-routable extension of another network, whether it be the Internet, a local area network, a wide area network, a cellular network, a personal area network, or some other type of network that is capable of integration with an IP-based network.

Methods and systems for a mobile, broadband, routable internet

Digital predistortion system, methods and circuitry for adapting a predistortion system linearizing a non-linear element. The system is a multiply partitioned architecture that addresses long or 'memory' effects, and separately addresses shorter duration effects. In a preferred method, the non-linear element is first modeled in software as a nonlinearity and a linearity in cascade form, preferably a Wiener model. The model is validated and adapted to minimize an observed error between the model and the non-linear element. The software model of the non-linear element is then used first to model a predistortion block that addresses short duration effects, and second to separately model a predistortion block that addresses longer duration effects. The models are software executable by an external processor in real time. Periodically the models are executed and used to update the adaptive parameters of the predistortion system without interrupting the system operation.

System and method for computing parameters for a digital predistorter

System and methods for a digital linearization of a non-linear element. Preferred embodiments provide digital predistortion methods and circuitry that addresses long or 'memory' effects and separately shorter duration effects, these two predistortion functions are operated together in an adaptive fashion with a non-linear element to provide a highly linear system. A long predistortion block comprises a plurality of configurable parallel coupled memory blocks, each further comprising a programmable nonlinearity, variable delays, digital filters, and signal combiners. These parallel blocks are selectively configured to provide a parallel filter, a Hammerstein filter and a compound Volterra filter. The parallel coupled memory blocks include programmable parameters that enable real time adaptation of the predistortion; the delay elements also include variable delays. The combined system of the predistortion circuitry and a non-linear element has a linear input-output signal response. Methods for initializing, parameterizing and adapting the system are disclosed.

System and method for digitally correcting a non-linear element

An apparatus providing additional response for a distortion correcting device that receives a first signal at a correcting input and provides a first delayed output signal at an output includes: (a) A first signal combiner coupled with an input and the correcting input. (b) A delay unit coupled with the input provides a second delayed signal to a delayed signal terminal. (c) A second signal combiner coupled with the delayed signal terminal and the output employs the output signal and the second delayed signal to present an error signal at a first error terminal. (d) An adaptive circuit coupled with the input locus, the first signal combiner and the second signal combiner employs provides a supplemental signal to the first signal combiner which employs the input signal and the supplemental signal to present the first signal to reduce the error signal.

Apparatus and method providing non-linear adaptive signal tracking

A transceiver for time-domain duplexed (TDD) communications, for example in connection with wireless broadband data communications, is disclosed. The transceiver includes digital predistortion compensation circuitry, which compensates the digital signals to be transmitted based on feedback signals from the output of the power amplifier, in order to linearize the output from the power amplifier. The feedback signals from the power amplifier are coupled back to the digital predistortion circuitry over part of the same receive path as the received signals from the wireless communications channel. The shared path includes analog-to-digital converters that are used both in the transmit period of the TDD cycle to convert the feedback signals from the power amplifier output, and in the receive period of the TDD cycle to convert the analog received signals.

Simplified digital predistortion in a time-domain duplexed transceiver

In one embodiment of the invention, a modulator mixes a transmit-path signal based on a local oscillator (LO) signal and an amplifier amplifies the mixed transmit-path signal to generate an output signal for transmission. A demodulator generates a receive-path signal based on the output signal and the LO signal. Phase-shift control components provide the output signal and the LO signal to the demodulator during a first time duration and provide a phase-shifted version of one of the output signal and the LO signal to the demodulator during a second time duration. The demodulator generates a second receive-path signal based on the one of the phase-shifted output signal and the phase-shifted LO signal during the second time duration. At least one predistortion circuit adjusts at least one of the transmit-path signal and the receive-path signal based on a difference in signal characteristics of the receive-path signal during the second time duration relative to the first time duration.

Distortion compensation in a communication system

System and methods for a digital linearization of a non linear element. Digital predistortion methods and circuitry for linearizing a non-linear element that address long or 'memory' effects and shorter duration effects, these two predistortion functions are operated together in an adaptive fashion with the non-linear element to provide a highly linear system. A short duration predistortion block comprises an Nth order polynomial filter coupled to a programmable linear equalizer. The Nth order filter includes programmable non-linearities and variable delay taps. The Nth order filter may be configured to implement a non-sequential or a sequential ordered polynomial. The equalizer may, in a preferred embodiment, include circuitry for equalizing imbalances between real and complex signal values. The Nth order filter may implement a compound Volterra filter. The combined system of the predistortion circuitry and a non-linear element has a linear input-output signal response. Methods for initializing, parameterizing and adapting the system are disclosed.

System and methods for digitally correcting a non-linear element using a digital filter for predistortion

An apparatus is provided to determine pre-distortion for a nonlinear system. The apparatus comprises a datapath and a power amplifier. The datapath employs predistortion data to generally linearized the power amplifier. To generate this predistortion data, an indirect learning circuit and a direct learning circuit can be employed. The indirect learning circuit is generally coupled to the amplifier circuit so that it can iteratively adjust predistortion data during an indirect learning mode until convergence is reached. The direct learning circuit is generally coupled to the amplifier circuit and the indirect learning circuit and that receives the input signal so that the predistortion data can be copied to the direct learning circuit from the indirect learning after convergence is reached and so that the direct learning circuit can adjust the predistortion data during a direct learning mode.

Method and system for calculating the pre-inverse of a nonlinear system

Digital predistortion system, methods and circuitry for linearizing a non-linear element using a multiply partitioned architecture that first addresses long or 'memory' effects, and separately addresses shorter duration effects. These blocks or circuits are operated with the non-linear element to provide a highly linear system. A first or long predistortion block receives a baseband signal input and includes a plurality of parallel memory blocks each including a programmable linearity, a digital filter, summers, multipliers and multiplexers with control signals for configuring the blocks to form filters of different types. A second or short predistortion block is coupled to the long predistortion block and comprises a generalized Nth order polynomial filter coupled to a programmable linear equalizer. The first predistorter block compensates for effects of a longer duration, and the second predistorter block compensates for effects of a shorter duration. Methods for initializing, parameterizing and adapting the system are disclosed.

System and method for digitally correcting a non-linear element using a multiply partitioned architecture for predistortion

A wireless base station () for transmitting spread spectrum signals is disclosed. The base station () includes a peak compression unit (), which is comprised of a sequence of peak detection and cancellation circuits (). Each peak detection and cancellation circuit () detects and compresses identified peaks. The further stages of peak detection and cancellation circuits () serve to reduce peaks that, as a result of 'peak regrowth', are caused at sample points near to a reduced peak point. According to one disclosed embodiment, a peak sample point is not qualified for compression unless a number of sample points subsequent to the peak all have lower magnitude than that of the peak. The cancellation pulses applied by the peak detection and cancellation circuits () may be generated by a finite impulse response (FIR) filter pulse, or alternatively by a minimum phase infinite impulse response (IIR) pulse. The peak compression unit () identifies and compresses statistical peaks in the digital symbol amplitude, so that the dynamic range requirements of the power amplifier () in the base station () may be relaxed.

Crest factor reduction processor for wireless communications

System and method for preprocessing a signal for transmission by a power amplifier. In a preferred embodiment a multiple input multiple output processor is coupled to a plurality of power amplifiers for transmitting a signal, where the number of power amplifiers exceeds the number of antennas. The multiple input multiple output processor performs an algorithm to optimize the output vector ensuring that the transmit power for any one amplifier is below a predetermined threshold. In a preferred embodiment a Remez optimization algorithm is performed. Alternative optimization algorithms may be used. In a preferred embodiment the processor is a single integrated circuit. A method is disclosed where a multiple output vector is produced for transmission, using an optimization algorithm to produce an output vector that ensures that for any of the power amplifiers, the transmit power is maintained below a predetermined threshold.

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Plano, TX, United States of America

Gregory Copeland