International Business Machines Corporation

Endicott Interconnect Technologies, Inc.

Gregory A Kevern

Robert Maynard Japp

William John Rudik

Elizabeth F Foster

Francis S Poch

Anita Sargent

Donald Seton Farquhar

Michael Joseph Klodowski

A method of making a circuitized substrate such as a laminate chip carrier in which a polymer, e.g., Teflon, is used as a dielectric layer and a promotion adhesion layer of a polymer is used to securely adhere a conductive layer thereto which is deposited by plating. The resulting product is thus able to provide extremely narrow conductive circuitry for subsequent connections, e.g., to a semiconductor chip. Electroless plating is the preferred plating method with the dielectric immersed in a solution of conductive monomers, e.g., pyrrole monomer, the solution also possibly containing a seed material such as palladium-tin.

Circuitized substrate with conductive polymer and seed material adhesion layer

The present invention provides a structure. The structure includes a stack of sheets. Successive sheets in each pair of successive sheets of the stack are coupled to each other by a removable adhesive. The removable adhesive is also disposed on top and bottom surfaces of the stack so as to respectively couple first and second layers to the cop and bottom surfaces of the stack.

Drill stack formation

A laminate circuit structure assembly is provided that comprises at least two modularized circuitized voltage plane subassemblies; optionally an interposer located between each of the subassemblies, and wherein the subassemblies and interposer, if present, are bonded together with a cured dielectric coating. The interposer comprises dielectric layers disposed about an internal electrically conductive layer.

Composite laminate circuit structure

Circuitized substrate and method of making same

A method for fabricating a laminate circuit structure is provided. The method comprises: providing at least two modularized circuitized voltage plane subassemblies wherein each of the subassemblies comprise at least two signal planes having an external and internal surface disposed about an internal voltage plane; providing a dielectric material between the signal and voltage planes; and providing dielectric on each external surface of each signal plane; and providing a non-cured or partially cured curable dielectric composition between the subassemblies wherein the dielectric composition comprises, dielectric material that is of the same material as the dielectric material used in said subassemblies, aligning the subassemblies, and then laminating to cause bonding of the subassemblies.

Method of fabricating a laminate circuit structure

The present invention provides a method of temporarily adhering a stack of sheets together to facilitate drilling a hole through the stack of sheets. The method includes using a temporary adhesive that prevents burring while drilling a hole through the stack.

An electronic package and method of making the electronic package is provided. An opening in a thermally conductive member of the electronic package is formed to substantially prevent adhesive which can bleed from under a substrate mounted and secured on the thermally conductive member from contacting a portion of the thermally conductive member upon which an electrical element will be mounted.

Growing community of inventors

Johnson City, NY, United States of America

Gregory A Kevern