Azur Space Solar Power Gmbh

3-5 Power Electronics Gmbh

Azur Space

Gregor Keller

Daniel Fuhrmann

Clemens Waechter

Volker Dudek

Matthias Meusel

Gerhard Strobl

Thorsten Wierzkowski

Thomas Lauermann

Rosalinda Van Leest

Clemens Wächter

A vapor phase epitaxy method of growing a III-V layer with a doping profile that changes from n-doping to p-doping on a surface of a substrate or a preceding layer in a reaction chamber from the vapor phase of an epitaxial gas flow, comprising at least one carrier gas, a first precursor for a first element from main group III and at least one second precursor for a first element from main group V, and fed into the reaction chamber, wherein, when a first growth level is reached, an initial n-doping level is set by means of a ratio, leading to a p-doping, of a first mass flow of the first precursor to a second mass flow of the second precursor in the epitaxial gas flow and with the addition of a third mass flow of a third precursor for an n-type dopant to the epitaxial gas flow, subsequently.

Vapor phase epitaxy method

A vapor phase epitaxy method of growing a III-V layer with a doping profile that changes from a p-doping to an n-doping on a surface of a substrate or a preceding layer from the vapor phase from an epitaxial gas flow, at least one first precursor for an element of main group III, and at least one second precursor for an element of main group V. When a first growth height is reached, a first initial doping level is set by means of a ratio of a first mass flow of the first precursor to a second mass flow of the second precursor in the epitaxial gas flow, and subsequently, by stepwise or continuously changing the ratio of the first mass flow to the second mass flow and by stepwise or continuously increasing a mass flow of a third precursor for an n-type dopant in the epitaxial gas flow.

A vapor phase epitaxy method of growing a III-V layer with a doping that changes from a first conductivity type to a second conductivity type on a surface of a substrate or a preceding layer in a reaction chamber from the vapor phase from an epitaxial gas flow comprising a carrier gas, at least one first precursor for an element from main group III, and at least one second precursor for an element from main group V, wherein when a first growth height is reached, a first initial doping level of the first conductivity type is set by means of a ratio of a first mass flow of the first precursor to a second mass flow of the second precursor in the epitaxial gas flow, the first initial doping level is then reduced to a second initial doping level of the first or low second conductivity type.

A stacked monolithic multijunction solar cell, which includes a first subcell having a p-n junction with an emitter layer and a base layer, the thickness of the emitter layer being less than the thickness of the base layer at least by a factor of ten, and the first subcell comprising a substrate having a semiconductor material from the groups III and V or a substrate from the group IV, and which further includes a second subcell arranged on the first subcell and a third subcell arranged on the second subcell, the two subcells each including an emitter layer and a base layer, and a tunnel diode and a back side field layer each being formed between the subcells, the thickness of the emitter layer being greater than the thickness of the base layer in each case between the second subcell and in the third subcell.

Stacked monolithic multijunction solar cell

A stacked high barrier III-V power semiconductor diode having an at least regionally formed first metallic terminal contact layer and a heavily doped semiconductor contact region of a first conductivity type with a first lattice constant, a drift layer of a second conductivity type, a heavily doped metamorphic buffer layer sequence of the second conductivity type is formed. The metamorphic buffer layer sequence has an upper side with the first lattice constant and a lower side with a second lattice constant. The first lattice constant is greater than the second lattice constant. The upper side of the metamorphic buffer layer sequence is arranged in the direction of the drift layer. A second metallic terminal contact layer is arranged below the lower side of the metamorphic buffer layer sequence. The second metallic terminal contact layer is integrally bonded with a semiconductor contact layer.

Stacked high barrier III-V power semiconductor diode

A stacked, high-blocking III-V semiconductor power diode having a first metallic terminal contact layer, formed at least in regions, and a highly doped semiconductor contact region of a first conductivity type and a first lattice constant. A drift layer of a second conductivity type and having a first lattice constant is furthermore provided. A semiconductor contact layer of a second conductivity, which includes an upper side and an underside, and a second metallic terminal contact layer are formed, and the second metallic terminal contact layer being integrally connected to the underside of the semiconductor contact layer, and the semiconductor contact layer having a second lattice constant at least on the underside, and the second lattice constant being the lattice constant of InP, and the drift layer and the highly doped semiconductor contact region each comprising an InGaAs compound or being made up of InGaAs.

Stacked, high-blocking InGaAs semiconductor power diode

A vapor phase epitaxy method of growing a III-V layer with a doping that changes from a first conductivity type to a second conductivity type on a surface of a substrate or a preceding layer in a reaction chamber from the vapor phase from an epitaxial gas flow comprising a carrier gas, at least one first precursor for an element from main group III, and at least one second precursor for an element from main group V, wherein when a first growth height is reached, a first initial doping level of the first conductivity type is set by means of a ratio of a first mass flow of the first precursor to a second mass flow of the second precursor, then the first initial doping level is reduced to a second initial doping level of the first or low second conductivity type.

A vertical high-blocking III-V bipolar transistor, which includes an emitter, a base and a collector. The emitter has a highly doped emitter semiconductor contact region of a first conductivity type and a first lattice constant. The base has a low-doped base semiconductor region of a second conductivity type and the first lattice constant. The collector has a layered low-doped collector semiconductor region of the first conductivity type with a layer thickness greater than 10 &#x3bc;m and the first lattice constant. The collector has a layered highly doped collector semiconductor contact region of the first conductivity type. A first metallic connecting contact layer is formed in regions being integrally connected to the emitter. A second metallic connecting contact layer is formed in regions being integrally connected to the base. A third metallic connecting contact region is formed at least in regions being arranged beneath the collector.

Vertical high-blocking III-V bipolar transistor

A vapor phase epitaxy method including: providing a III-V substrate of a first conductivity type, introducing the III-V substrate into a reaction chamber of a vapor phase epitaxy system at a loading temperature, heating the III-V substrate from the loading temperature to an epitaxy temperature while introducing an initial gas flow, depositing a III-V layer with a dopant concentration of a dopant of the first conductivity type on a surface of the III-V substrate from the vapor phase from an epitaxial gas flow, fed into the reaction chamber and comprising the carrier gas, the first precursor, and at least one second precursor for an element of main group III, wherein during the heating from the loading temperature to the epitaxy temperature, a third precursor for a dopant of the first conductivity type is added to the initial gas flow.

An optical voltage source and decoupling device is provided, wherein the optical voltage source has a number N of series-connected semiconductor diodes, each having a p-n junction, the semiconductor diodes are monolithically integrated and together form a first stack with an upper side and an underside, and the number N of the semiconductor diodes of the first stack is greater than or equal to two, the decoupling device has a further semiconductor diode. The further semiconductor diode has a pin junction and, the further semiconductor diode is anti-serially connected with the semiconductor diodes of the first stack. An underside of the further semiconductor diode is materially connected with the upper side of the first stack and the further semiconductor diode forms a total stack together with the first stack.

Optical voltage source

A receiver unit having an optically operated voltage source, the voltage source including a first stack having an upper side and an underside and being formed on an upper side of a non-Si substrate based on III-V semiconductor layers arranged in the shape of a stack, and having a second electrical terminal contact on the upper side of the first stack and a first electrical terminal contact on an underside of the non-Si substrate, a voltage generated with the aid of the incidence of light onto the upper side of the first stack being present between the two terminal contacts, and including a second stack having a MOS transistor structure having III-V semiconductor layers and including a control terminal and a drain terminal and a source terminal. The MOS transistor structure being designed as a depletion field effect transistor.

Growing community of inventors

Heilbronn, Germany

Gregor Keller