Apple Inc.

Greg Nayman

Jeffrey J Terlizzi

Albert John Golko

Robert D Watson

Darshan R Kasar

Edwin W Foo

James L McPeak

Zhiping Yang

Kirill Kalinichev

Richard F Avra

Georgi Beloev

Chih-Ang Chen

Maziar H Moallem

Gaurav S Gulati

Songping Wu

Joong-Seok Moon

Juhong Zhu

Methods and apparatus for equalization of a high speed serial bus. A well-tuned passive equalization circuit for use with high frequency differential signals suffer from e.g., impedance mismatches, impedance discontinuities (e.g., connectors, etc.). In one embodiment, a shunting circuit is inserted between the differential terminals of a Universal Serial Bus (USB) cable, connector, etc. The shunting circuit is configured to 'open' at low frequencies to enable Full Speed (FS) enumeration, while also providing sufficiently high impedance at high frequencies to enable High Speed (HS) operation. In one such implementation, the shunting circuit includes a tuned resistor, capacitor, inductor, and switch element arranged in series.

Methods and apparatus for equalization of a high speed serial bus

A docking station configured to mate to an electronic device enables methods of interacting with the electronic device by impacting (e.g., knocking) on a table on which the device and/or the docking station are disposed and by means of contactless gestures. The electronic device may remain in a powered off state while the docking station continuously monitors for user input. The docking station may have a processor that is capable of detecting a user's impact and contactless gesture inputs.

Impact and contactless gesture inputs for electronic devices

Impact and contactless gesture inputs for docking stations

In an embodiment, a methodology for automating the generation of a programmable logic device implementation of at least a portion of an integrated circuit is contemplated. The methodology may operate on one or more hardware description language (HDL) files which describe the integrated circuit as an input. Additionally, one or more user-generated control files may be input to the methodology. The methodology may process the one or more HDL files, generating a bitstream to program one or more programmable logic devices to implement the described design. The methodology may include automated modification of the HDL files to prepare them for programmable logic device implementation, automated pad ring generation, automated pin multiplexing, daughter card definition, partitioning, etc.

Automated framework for programmable logic device implementation of integrated circuit design

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Mountain View, CA, United States of America

Greg Nayman