Intel Corporation

Greg J Regnier

Radia Joy Perlman

Anil Vasudevan

Thomas D Lovett

Ilango S Ganga

Hugh Wilkinson

Alain Gravel

Hemal Vinodchandra Shah

William T Futral

Annie Foong

Gary L McAlpine

Rajesh Sankaran Madukkarumukumana

Dave B Minturn

David B Minturn

Ali S Oztaskin

Vikram A Saletore

Stanley S Amway, Iii

Jeffrey M Butler

This disclosure describes enhancements to Ethernet for use in higher performance applications like Storage, HPC, and Ethernet based fabric interconnects. This disclosure provides various mechanisms for lossless fabric enhancements with error-detection and retransmissions to improve link reliability, frame pre-emption to allow higher priority traffic over lower priority traffic, virtual channel support for deadlock avoidance by enhancing Class of service functionality defined in IEEE 802.1Q, a new header format for efficient forwarding/routing in the fabric interconnect and header CRC for reliable cut-through forwarding in the fabric interconnect. The enhancements described herein, when added to standard and/or proprietary Ethernet protocols, broadens the applicability of Ethernet to newer usage models and fabric interconnects that are currently served by alternate fabric technologies like Infiniband, Fibre Channel and/or other proprietary technologies, etc.

Ethernet enhancements

This disclosure describes enhancements to Ethernet for use in higher performance applications like Storage, HPC, and Ethernet based fabric interconnects. This disclosure provides various mechanisms for lossless fabric enhancements with error-detection and retransmissions to improve link reliability, frame pre-emption to allow higher priority traffic over lower priority traffic, virtual channel support for deadlock avoidance by enhancing Class of service functionality defined in IEEE 802.1Q, a new header format for efficient forwarding/routing in the fabric interconnect and header CRC for reliable cut-through forwarding in the fabric interconnect. The enhancements described herein, when added to standard and/or proprietary Ethernet protocols, broadens the applicability of Ethernet to newer usage models and fabric interconnects that are currently served by alternate fabric technologies like Infiniband, Fiber Channel and/or other proprietary technologies, etc.

One embodiment provides a method for enabling class-based credit flow control for a network node in communication with a link partner using an Ethernet communications protocol. The method includes receiving a control frame from the link partner. The control frame includes at least one field for specifying credit for at least one traffic class and the credit is based on available space in a receive buffer associated with the at least one traffic class. The method further includes sending data packets to the link partner based on the credit, the data packets associated with the at least one traffic class.

Credit flow control for ethernet

Proxy nodes perform TCP/IP processing on behalf of application nodes, utilize lightweight protocols to communicate with application nodes, and communicate with network nodes and network clients using Transmission Control Protocol/Internet Protocol (TCP/IP).

Decoupling TCP/IP processing in system area networks with call filtering

An apparatus and method related to performing Remote Direct Memory Access Request ('RDMA') is presented. In one embodiment, the apparatus comprises Remote direct memory access ('RDMA') logic that executes a direct memory access (&#x201c;DMA&#x201d;) request from the remote peer. The apparatus further comprising a protection checking logic to verify a key and a target address in the DMA request and conversion logic to convert the target address to an input/output virtual address (&#x201c;IOVA&#x201d;) if the conversion is required. The IOVA is to be translated to the host physical address by an address translation unit at another hardware subsystem.

Method and apparatus by utilizing platform support for direct memory access remapping by remote DMA ('RDMA')-capable devices

A data network and a method for providing prioritized data movement between endpoints connected by multiple logical channels. Such a data network may include a first node comprising a first plurality of first-in, first-out (FIFO) queues arranged for high priority to low priority data movement operations; and a second node operatively connected to the first node by multiple control and data channels, and comprising a second plurality of FIFO queues arranged in correspondence with the first plurality of FIFO queues for high priority to low priority data movement operations via the multiple control and data channels; wherein an I/O transaction is accomplished by one or more control channels and data channels created between the first node and the second node for moving commands and data for the I/O transaction during the data movement operations, in the order from high priority to low priority.

Method for providing prioritized data movement between endpoints connected by multiple logical channels

Address translation for a source and destination of the data that utilizes different page tables. A direct memory access (DMA) engine is used as a memory-to-memory copy engine by utilizing a page-table walk and address translation for a source side of the copy, and an independent page-table walk and address translation for a destination side of the copy.

Inter-domain data mover for a memory-to-memory copy engine

An apparatus and a system may include an adaptation module, a plurality of Direct Transport Interfaces (DTIs), a DTI accelerator, and a Transport Control Protocol/Internet Protocol (TCP/IP) accelerator. The adaptation module may provide a translated sockets call from an application program to one of the DTIs, where an included set of memory structures may couple the translated sockets call to the DTI accelerator, which may in turn couple the set of memory structures to the TCP/IP accelerator. An article may include data causing a machine to perform a method including: receiving an application program sockets call at the adaptation module, deriving a translated sockets call from the application program sockets call, receiving the translated sockets call at a DTI, coupling the translated sockets call to a DTI accelerator using a set of memory structures in the DTI, and coupling the set of memory structures to a TCP/IP accelerator.

Embedded transport acceleration architecture

Methods and apparatus process a plurality of interrupt status words from a network interface controller (NIC) to a plurality of processes. A first per-virtual circuit interrupt status word and a second per-virtual circuit interrupt status word can be sent by a per-virtual circuit interrupter having a per-virtual circuit interrupt output. A NIC interrupter can be in communication with the per-virtual circuit interrupt output and have a NIC interrupt output to send a first NIC interrupt status word and a second NIC interrupt status word to a global interrupt queue of a host system. The NIC interrupter can generate an interrupt signal to the host system, and a proxy interrupt handler of the host system can be in communication with the NIC interrupter. The proxy interrupt handler can awaken at least in part in response to the interrupt signal, and read the first NIC interrupt status word and the second NIC interrupt status word from the global interrupt queue, wake the first process and the second process, and send the first NIC interrupt status word to the first process and the second NIC interrupt status word to the second process.

Hierarchical interrupt structure for event notification on multi-virtual

A virtual connection created between an application program and a selected I/O device is used as a communications medium for controlling I/O processing of the I/O device by the application program. The virtual connection is implemented as a system area network connecting a process of the application program and the I/O device. The application program registers the application program's memory that the application program shares with the I/O device (i.e., gives access rights to the I/O device) with the system area network. Once the virtual connection is created and initialized, the application program uses the virtual connection to send request messages for I/O services to the I/O device and to receive reply messages from the I/O device. The I/O device uses the virtual connection to obtain source data from the application program's memory for I/O write operations and to transfer data to the application program's memory for I/O read operations.

System for transferring I/O data between an I/O device and an

A first host system directs an I/O device to transfer data directly between a requesting application program's buffers on a second host system and an I/O unit coupled to the I/O device without the need to pass through the first host system. Since the first host system retains control of the I/O request, it maintains security and protection features at the same time as realizing increases in performance gained from not having to participate in the actual data transfer. This direct movement capability supports peer-to-peer operation where a number of different I/O units, each with its own physical memory addressing domain, require access to the same I/O device. The direct movement capability is also useful in clustered systems. Clustered host systems are allowed direct access to an I/O device for data transfer without intervention by the host system owning the I/O device.

Growing community of inventors

Portland, OR, United States of America

Greg J Regnier