Intel Corporation

Greg F Taylor

Keng L Wong

Hong-Piao Ma

Edward Allyn Burton

Ming Lei Zhang

James W Tschanz

Chee How Lim

Chris Wilkerson

Randy J Aksamit

Robert J Greiner

Hasnain Lakdawala

Xia Dai

Arijit Raychowdhury

Songmin Kim

George L Geannopoulos

Douglas Robert Huard

Tawfik Arabi

Michael C Rifani

Kent R Callahan

Soumyanath Krishnamurthy

Timothy M Wilson

Ali Muhtaroglu

Yee (William) Li

Gerald S Pasdast

Jeff Jones

Atul Maheshwari

Navindra Navaratnam

Cangsang Zhao

Paul F Newman

John T Orton

Niraj Bindal

Chee Bow Lim

George Geannopuolos

Disclosed herein are approaches to reducing a guardband (margin) used for minimum voltage supply (Vcc) requirements for memory such as cache.

Apparatus and method to reduce memory power consumption by inverting data

A thermal sensor is provided that includes a front-end component, an analog-to-digital converter and a digital backend. The front-end component including an array of current sources, a dynamic element matching (DEM) device, an analog chopper and two diodes to sense temperatures on the die. The front-end component to provide analog signals at two output nodes based on currents through the two diodes. The analog-to-digital converter to receive the analog signals from the front-end component and to provide an output signal. The digital backend to receive the output signal from the analog-to-digital converter and to provide a calculated temperature.

Thermal sensor device

Memory data inversion for reducing power consumption

Data inversion based approaches for reducing memory power consumption

In one embodiment, the present invention includes an oscillator to generate a first frequency and a second frequency. The oscillator includes a plurality of stage cells, each stage cell including a first transistor of a first polarity and a second transistor of a second polarity, each coupled between a first voltage node and a first intermediate node and an inverter coupled to the first intermediate node. In operation, a difference between the first frequency and the second frequency is proportional to a threshold voltage of the second transistor. Other embodiments are described and claimed.

Measuring threshold voltage of transistors in a circuit

An apparatus is provided that includes a clock distribution network, a plurality of distributed oscillators provided about the clock distribution network so as to provide clock signals on the clock distribution network and a power control circuit to control power applied to the plurality of distributed oscillators. The power control circuit includes a bandgap device to produce a reference voltage based on a desired power level and a comparing/decision device to receive the reference voltage from the bandgap device and to receive the voltage signal from a source external to the apparatus. The comparing/decision device determines whether the signal received from the power source corresponds to the desired power level.

Voltage control for clock generating circuit

An on-die device is provided to measure/detect voltage fluctuations. This may include a control unit to generate differential reference signals (such as differential current signals), a first detector unit and a second detector unit. The differential reference signals may be generated based on a Vcc reference signal and a Vss reference signal. The first detector unit may receive the differential reference signals from the control unit and may receive first voltage signals (also called monitored signals) from a first device under test (DUT) located on the die or from a first area on the die. The first detector unit may provide (or output) a first signal indicative of a voltage fluctuation (voltage droop or overshoot) of the first voltage signals. The second detector unit may receive the differential reference signals from the control unit and may receive second voltage signals (also called monitored signals) from a second device under test (DUT) located on the die. The second detector unit may provide (or output) a second signal indicative of a voltage fluctuation (or voltage droop) of the second voltage signals.

Method and apparatus for on-die voltage fluctuation detection

Resonance reduction arrangements to reduce the impact of power supply resonance on circuits, comprising a resonance sensor and a charge dumper, wherein upon the detection of the predetermined resonance by the resonance sensor at a circuit location, the charge dumper dumps charges at least one of from and to the circuit location, wherein the charge dumper comprises at least one gating transistor to dump the charges, the at least one gating transistor is directly connected to a first power supply line having a first potential and a second power supply line having a second potential of a different potential than the first potential.

Resonance reduction arrangements

A system and method for processing signals determines rise and fall times of a driving signal, compares the rise and fall times to desired values, and independently controls the rise and fall times to equal the desired values. The rise and fall times may be controlled by generating one or more first correction bits based on a difference between the rise time and a corresponding one of the desired values, generating one or more second correction bits based on a difference between the fall time and a corresponding one of the desired values, and then separately applying the bits to independently control the rise and fall times of the driving signal. The driving signal may be an I/O signal or another type of signal.

Closed-loop independent DLL-controlled rise/fall time control circuit

A clock generating circuit is provided that includes a multiplexing device coupled to a clock distribution network to select between a synchronous mode and an asynchronous mode. The device may also include a plurality of distributed ring oscillators to drive the clock distribution network in the asynchronous mode. In the synchronous mode, the multiplexing device may pass a signal from a phase lock loop circuit located external to a core.

Clock generating circuit and method

An apparatus and method are provided for operating a processor core. This may include a first circuit to operate at a frequency that is dependent on a power supply voltage. A frequency control circuit may be provided to control a frequency of the first circuit by directing a voltage regulator to increase or decrease the power supply voltage.

Voltage ID based frequency control for clock generating circuit

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Portland, OR, United States of America

Greg F Taylor