Intel Corporation

Micron Technology Incorporated

Other

Stmicroelectronics S.r.l.

Ovonyx Inc.

Greg Atwood

Ilya V Karpov

Yudong Kim

Charles C Kuo

Tyler A Lowrey

Maria Santina Marangon

Johanna M Swan

Valluri Ramana Rao

Chien Chiang

Bala Natarajan

Steven E Wells

Robert N Hasbun

Mark E Bauer

Albert Fazio

Mark J Christopherson

Sean Jong Lee

In various examples, a dual resistance heater for a phase change material region is fabricated by forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, the portion of the resistive material proximate to the phase change material region forms a heater because of its high resistance value, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.

Dual resistance heater for phase change memory devices

In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.

Dual resistive-material regions for phase change memory devices

An ovonic threshold switch may be formed of a continuous chalcogenide layer. That layer spans multiple cells, forming a phase change memory. In other words, the ovonic threshold switch may be formed of a chalcogenide layer which extends, uninterrupted, over numerous cells of a phase change memory.

Phase change memory with threshold switch select device

A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.

Dual resistance heater for phase change devices and manufacturing method thereof

Both a chalcogenide select device and a chalcogenide memory element are formed within vias within dielectrics. As a result, the chalcogenides is effectively trapped within the vias and no glue or adhesion layer is needed. Moreover, delamination problems are avoided. A lance material is formed within the same via with the memory element. In one embodiment, the lance material is made thinner by virtue of the presence of a sidewall spacer; in another embodiment no sidewall spacer is utilized. A relatively small area of contact between the chalcogenide used to form a memory element and the lance material is achieved by providing a pin hole opening in a dielectric, which separates the chalcogenide and the lance material.

Phase change memory and manufacturing method thereof

A phase change memory may be formed to have a dimension that is sub-lithographic in one embodiment by forming a surface feature over the phase change material, and coating the surface feature with a mask of sub-lithographic dimensions. The horizontal portions of the mask and the surface feature may then be removed and the remaining portions of the mask may be used to define a dimension of said phase change material. Another dimension of the phase change material may be defined using an upper electrode extending over said phase change material as a mask to etch the phase change material.

Forming phase change memory arrays

An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently filled with a conductive member. The conductive member is located on a lower die and interconnects integrated circuits of the upper and lower dies. Laser-drilling allows for faster throughput when compared to, for example, etching, especially if a small number of openings has to be formed. The opening is laser-drilled from an upper surface of the upper die all the way through the die, which allows for the use of alignment marks on an upper surface of the upper die.

Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme

A method of utilizing circuitry including error detecting and correcting circuitry to detect and correct errors which can occur in data stored in multi-bit per cell format in a flash EEPROM memory array before those errors can affect the accuracy of data provided by a flash EEPROM memory array.

Growing community of inventors

San Jose, CA, United States of America

Greg Atwood