Hewlett Packard Enterprise Development LP

Hewlett-packard Development Company, L.p.

Greg Astfalk

Russ William Herrell

Gregg Bernard Lesartre

Andrew Ray Wheeler

David A Fattal

Raymond G Beausoleil

Marco Fiorentino

Gary A Gibson

Naveen Muralimanohar

Douglas L Voigt

Martin Foltin

Moray McLaren

Nathan Lorenzo Binkert

Boris Zuckerman

Amit S Sharma

Kirk M Bresniker

Moray Mclaren

A security framework for a multi-tenant, multi-tier computer system with embedded processing is described. A multi-tenant security framework is created for a combined processing and storage hierarchy of multiple tiers. The multi-tenant security framework is applied to multiple execution levels of the memory device. The multi-tenant security framework is applied to multiple layers of application server software of the memory device. The multi-tenant security framework is also applied to multiple layers of storage server software of the memory device.

Multi-tier security framework

Example implementations relate to a method of tracking data in a non-volatile memory device (NVM) device. A meta-data block from the NVM device is obtained, where the meta-data block includes meta-data. The meta-data block from the NVM device is used to track an associated data object, meta-data in the data block, a user data block, a meta-data block, or an additional data block. The meta-data block from the NVM device is used to point to the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block. The meta-data block from the NVM device is further used to link the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block.

Meta-data block within a non-volatile memory device

A unifying memory controller (UMC) to send and receive data to and from a local host. The UMC also may manage data placement and retrieval by using an address mapper. The UMC may also selectively provide power to a plurality of memory locations. The UMC may also manage data placement based on a policy that can make use of a property stored in the metadata storage location. The property may be a property describing the data that is being managed. The UMC also may use its own local cache that may store copies of data managed by the circuit.

Unifying memory controller

An integrated circuit is provided. In an example, the integrated circuit includes a first address line, a selector device electrically coupled to the first address lines, and a memory device electrically coupled between the selector device and a second address line. The selector device has a first I-V response in a first current direction and a second I-V response in a second current direction that is different from the first I-V response.

Circuits having selector devices with different I-V responses

A system including a driver circuit. The driver circuit is configured to provide first output signals in a first mode for electrical signaling and second output signals in a second mode for optical signaling. The driver circuit is configured to provide the first output signals in the first mode with at least one of a lower frequency and higher power and the second output signals in the second mode with at least one of a higher frequency and lower power.

System including driver circuit for electrical signaling and optical signaling

In one example, a composite processor includes a circuit board, a first processor element package, and a second processor element package. The circuit board has an optical link and an electrical link. The first processor element package includes a substrate with an integrated circuit, a sub-wavelength grating optical coupler, and an electrical coupler coupled to the electrical link of the circuit board. The second processor element package includes a substrate with an integrated circuit, a sub-wavelength grating optical coupler, and an electrical coupler coupled to the electrical link of the circuit board. The sub-wavelength grating optical coupler of the first processor element package, the optical link of the circuit board, and the sub-wavelength grating optical coupler of the second processor element package collectively define an optical communications path between the substrate of the first processor element package and the substrate of the second processor element package.

Composite processors

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Parker, TX, United States of America

Greg Astfalk