Northrop Grumman Systems Corporation

Westinghouse Electric Corporation

Grant H Watkins

Stephen P Caldwell

John P Muhlbaier

Norman G Matthews

Matthew Martello

Aldez C Hazzard

Phase compensation for the phase non-linearities introduced by the filters, amplifiers, and other microwave devices included in waveform generators in a radar system is achieved by first measuring the phase errors over a predetermined frequency range which are then fed to a pair of digital random access memories (RAMs), whereupon phase predistortion commands for both the local oscillator signal used to generate the RF transmit signal and the phase non-linearity in the RF transmit signal itself are called up and applied by first applying a predistortion phase shift to the local oscillator signal when it is being generated and secondly by applying a second predistortion phase shift when the RF transmit signal is being generated.

Radar exciter including phase compensation of the waveform generator

A frequency oscillator and a frequency multiplier multiplying the signals from the oscillator contain inherent phase noise. A phase noise canceller removes phase noise, due to both the oscillator and the multiplier, by inserting a delay in one path and comparing phases of the delayed signal and the undelayed signal. This comparison may be either fed back to the tuning port of the oscillator or fed forward to a phase shifter which shakes off the phase noise. The delay may include a delay line, a cavity or any other suitable device which produces a phase shift. The phase noise canceller may also be designed to remove the total phase noise of the system, including additive phase noise from sources other than the oscillator and multiplier. The canceller may be calibrated and may be designed to reduce periodic response thereof.

Method and apparatus for cancelling phase noise

A low cost direct frequency synthesizer is structured to operate with moderate bandwidth, good noise performance, superior spurious performance, and fast switching. The direct frequency synthesizer employs a starter frequency signal f.sub.o (33-1) and a set of LO frequency signals f.sub.1 through f.sub.n (35-1) spaced from each other by a frequency increment .delta.. A mixer circuit (34-1) generates a product of the starter frequency signal and the LO frequency signals. A divider (31-1) has a divider ratio equal to N. The number of LO frequency signals is equal to or less than N. The starter frequency f.sub.o has a value equal to .delta. times (N+x) where x is equal to 0 or a positive integer. The LO frequency f.sub.1 has a value equal to (N+1)f.sub.o. An intermediate nonswitchable band pass filter (36-1) passes a difference portion of the mixer product to the divider, and a nonswitchable output band pass filter (38-1) receives an output from the divider to generate a moderate bandwidth output.

Direct frequency synthesizer having moderate bandwidth

A large bandwidth communication system has a transmitter to transmit signals over a selectable frequency operating range and a receiver having a first mixer for mixing an LO1 signal with received transmit signals. The receiver has a first IF for processing signals received from the first mixer. A frequency synthesizer generates frequency signals for application to at least a transmit mixer in the transmitter and to at least the first mixer in the receiver. A computer system selects and applies a modified frequency value to at least one of plural frequencies used in the system that of the LO1 signal applied to the first mixer, that of a frequency signal applied to the transmit mixer, and an IF frequency of the first IF, with the modified frequency value selected as a function of the system operating frequency and stored spurious amplitude data so as to sidestep spurious signals in portions of the total system frequency operating bandwidth where spurious amplitudes are excessive and otherwise would interfere with quality reception.

Radar and other communication systems having large bandwidth and large

A direct frequency synthesizer is provided with a single stage or multiple cascaded stages. Each stage includes a fixed frequency input channel and a selectable frequency input channel which are coupled respectively to the I and L ports of a mixer. The input channel includes a divider having a divisor equal to N. The selectable frequencies range from f.sub.1 to f.sub.1 +j.theta.. Single-pole-multiple-throw switches selectively connect the fixed and selectable frequencies to the mixer to generate output frequency signals through an output filter bank. Specific relationships among N, n and .theta. are used to establish continuous output frequency coverage, stage cascadability and other synthesizer operating features.

Growing community of inventors

Dunkirk, MD, United States of America

Grant H Watkins