Cypress Semiconductor Corporation

Atmel Corporation

Grahame K Reynolds

Hammad Syed

Samuel Daniel Brunet

Vivek Pant

Christopher John Hill

Andrew Fuller

Philip M Daniell

In certain embodiments, a method includes performing a first positive integration by sensing a first rising edge of a charging signal of a touch sensor during a first synchronization period and performing a first negative integration by sensing a first falling edge of the charging signal during a second synchronization period. The method also includes toggling the charging signal, resulting in a second rising edge of the charging signal during the second synchronization period. The method further includes performing a second negative integration by sensing a second falling edge of the charging signal during a third synchronization period and performing a second positive integration by sensing a third rising edge of the charging signal during a fourth synchronization period. The first integrations are associated with a first sample measurement and the second integrations are associated with a second sample measurement.

Touch sensor signal integration

In certain embodiments, a method includes performing a first positive integration by sensing a first rising edge of a charging signal of a touch sensor during a first synchronization period, performing a first negative integration by sensing a first falling edge of the charging signal during a second synchronization period, and performing a first phase shift by skipping integration during a third synchronization period. The method further includes performing a second positive integration by sensing a second rising edge of the charging signal during a fourth synchronization period, performing a second negative integration by sensing a second falling edge of the charging signal during a fifth synchronization period, and performing a second phase shift by skipping integration during a sixth synchronization period. The first integrations are associated with a first sample measurement and the second integrations are associated with a second sample measurement.

In certain embodiments, a touch sensor controller estimates an area of a display screen that a display controller will update at a first time and estimates an area of a touch sensor that the touch sensor controller is expected to scan at the first time. The touch sensor controller further identifies an expected interference based on a comparison between the update of the estimated area of the display screen by the display controller at the first time and the scan of the estimated area of the touch sensor by the touch sensor controller at the first time. Based on the expected interference, the touch sensor controller suspends, for a first time period, the scan of the estimated area of the touch sensor for touch events based on the expected interference. The touch sensor controller resumes the scan after the first time period.

Suspension of touch sensor scan based on an expected interference

In certain embodiments, a touch sensor controller suspends a scan of a touch sensitive area of a touch sensor for touch events based on an expected interference between the scan and an update of a display screen. After the first time period, touch sensor controller resumes the scan.

In one embodiment, a method includes receiving a request to refresh a display for a refresh period, wherein the display is coupled to a touch sensor operable to detect touch input at the display. During a first phase of the refresh period, a first portion of the display is refreshed while the touch sensor a second portion and a third portion of the display is activated. The second portion and the third portion are a half screen distance apart. During a second phase of the refresh period, the second portion of the display is refreshed while the touch sensor at a fourth portion and a fifth portion of the display is activated. The fourth portion and the fifth portion are a half screen distance apart.

Simultaneous touch sensor scanning and display refreshing for display-embedded touch sensors

In one embodiment, a method includes receiving a request to refresh a display for a refresh period, wherein the display is coupled to a touch sensor operable to detect touch input at the display. The method also includes refreshing a first portion of the display and activating the touch sensor at a second portion of the display different from the first portion of the display during a first portion of the refresh period. The method further includes, during a second portion of the refresh period, refreshing a third portion of the display different from the first and second portions of the display and activating the touch sensor at a fourth portion of the display different from the first, second, and third portions of the display.

Simultaneous touch sensor scanning and display refreshing for minimizing display degradation for display-embedded touch sensors

The present invention discloses a method and system of generating and delivering a high voltage signal without latch-up hazards and without incurring a voltage drop due to the threshold of the switching element. The utilization of NMOS elements when switching a high voltage signal may remove latch-up hazards. Switching of the high voltage signal may be accomplished without incurring a voltage drop in the signal. With multiple transistors, switching of a high voltage signal in accordance with the present invention may provide an output driven to a destination circuit on each phase wherein clock cycles may be overlapping and non-overlapping.

High voltage switch with no latch-up hazards

An apparatus comprising a first arbiter cell, a second arbiter cell and a selection device. The first arbiter cell may be configured to lock if one or more requests are not resolved within a first predetermined time period. The second arbiter cell may be configured to dominate if the first arbiter cell enters a metastable state. The selection device may be configured to provide arbitration between the first and second arbiter cells within a second predetermined time period.

Multiport arbitration using phased locking arbiters

An apparatus comprising a margin logic circuit, one or more discriminator circuits and a sense circuit. The margin logic circuit may be configured to receive a plurality of requests and present one or more control signals. The one or more discriminators may be configured to (i) present one or more leading access signals and (ii) receive the one or more control signals and the plurality of requests. The sense circuit may be configured to receive the one or more leading access signals and the plurality of requests and present grant access signal. The sense circuit may be configured to reduce the effects of metastable conditions.

Method and apparatus for the use of discriminators for priority arbitration

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to arbitrate a plurality of input request signals and present one or more first control signals. The second circuit may be configured to control the arbitration in response to an adjustable balance point of the input request signals, where the balance point is adjusted to reduce a metastable state of the first circuit.

Arbiter/pulse discriminator circuits with improved metastable failure rate by delayed balance point adjustment

A circuit, system, and method are provided for regulating the mark-to-space ratio of a clocking signal. In instances where the mark-to-space ratio is targeted at 1:1 (i.e., a 50% duty cycle), then a regulated signal is formed which will produce a 50% duty cycle whenever that regulated signal is forwarded to a buffer which will produce a duty cycle other than 50% if the input signal were not regulated. The regulated signal is derived from a feedback circuit which will take into account the periodic nature of the clocking signal and whatever threshold skews might be attributable to the clock buffer. The feedback signal derives its input from a tap connected to receive the clocking signal from an output of the buffer, and the tap forwards that clocking signal to switching transistors which impute the periodic clocking frequency onto a threshold skewed output which will then form the regulated signal. Any skew resulting from the oscillator will not be passed to the node which bears the regulated signal. Instead, only the AC coupled portion of the oscillating signal will be coupled.

System and method for restoring the mark and space ratio of a clocking signal output from an oscillator

An apparatus comprising a first one or more threshold devices, a second one or more threshold devices and a logic device. The first one or more threshold devices may be configured to control an output. The second one or more threshold devices may be configured to receive the output. The logic device may be (i) coupled to the second one or more threshold devices and (ii) configured to provide a feedback to the first one or more threshold devices. The feedback may be configured to force a reset condition if a metastable event occurs.

Discriminator circuit

An apparatus comprising an arbiter cell and a delay logic circuit. The arbiter cell may be configured to receive a plurality of request signals and provide two or more grant signals. The delay logic circuit may be configured to interface the arbiter cell and force each of the plurality of request signals to be serviced in succession when a metastable state occurs.

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Lordswood, United Kingdom

Grahame K Reynolds