Cirrus Logic Inc.

Graeme Gordon Mackay

Gordon Richard McLeod

Jonathan Timothy Wigner

Andrew James Howlett

Douglas James Wallace MacFarlane

Andrew I Bothwell

Malcolm Blyth

Robert David Rand

This application relates to methods and apparatus for transfer of data between a host device () and a peripheral device () via a USB Type-C connector () of the host device. A data controller is described that has a path controller () for establishing signal paths between circuitry of the host device and contacts () of said USB Type-C connector. The path controller is operable in at least first and second modes. In the first mode the path controller establishes separate signal paths to each of at least first, second, third and fourth contacts (A, A, B, B) of the USB Type-C connector and a plurality of the established signal paths are for transfer of analogue audio data. In the second mode the path controller establishes a pair of signal paths to only a subset of said first to fourth contacts to provide a differential digital data path.

Connectors for audio data transfer

An integrated circuit for digital signal routing. Signal routing is achieved with a multiply-accumulate block, which takes data from one or more data sources and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock.

Digital signal routing circuit

An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. Multiple signal paths can be defined by configuration data supplied to the device, either by a user, or by software. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock. Each signal path has a respective sample clock rate, and paths with different sample clock rates can be routed through the multiply-accumulate block on a time division multiplexed basis independently of each other. Thus, speech signals at 8 kHz or 16 kHz can be processed concurrently with audio data at 44.ikHz or 48 kHz.

An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. Multiple signal paths can be defined by configuration data supplied to the device, either by a user, or by software. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock. Each signal path has a respective sample clock rate, and paths with different sample clock rates can be routed through the multiply-accumulate block on a time division multiplexed basis independently of each other. Thus, speech signals at 8 kHz or 16 kHz can be processed concurrently with audio data at 44.1 kHz or 48 kHz.

Circuitry detects properties of an accessory removably connected thereto via a multi-pole connector. The circuitry has first, second and third circuit terminals for coupling to respective first, second, and third poles of said connector, and has an output for providing evaluation values from which properties of the accessory may be derived. In the circuitry, first current sourcing circuitry is coupled to said first circuit terminal for providing a first current. A switch network comprises first, second, third and fourth switch network terminals, said first switch network terminal coupled to a reference potential, said second switch network terminal coupled to said second circuit terminal, and said third switch network terminal coupled to said third circuit terminal. Comparator circuitry provides a comparison signal, its first input terminal being coupled to said first circuit terminal. Second current sourcing circuitry having a monitor node coupled to said second comparator input terminal and an output node coupled to said fourth switch network terminal provides a second current to said switch network. At least one of said first current sourcing circuitry and said second current-sourcing circuitry is responsive to a digital control word for varying said first or said second current. Control logic is provided for operatively controlling the state of the interconnections of said switch network, for adjusting said digital control word in response to said comparison signal until a voltage at said first circuit terminal is equal to a voltage at said monitor node, and for supplying said adjusted digital control word associated with the state of the interconnections to said output as an evaluation value.

Detection circuit

A host device for use with a removable peripheral apparatus having a microphone, and to the biasing circuitry for said microphone. The host device may have a device connector for forming a mating connection with a respective peripheral connector. A source of bias is arranged to supply an electrical bias to a device microphone contact of the device connector via a biasing path. A capacitor is connected between a reference voltage node and a capacitor node of the biasing path. A first switch is located between the capacitor node and the device microphone contact. Detection circuitry detects disconnection of the peripheral connector and device connector; and control circuitry controls the switch to disable the biasing path.

Microphone biasing circuitry and method thereof

Methods and apparatus for detection and tracking of a signal envelope. The circuit comprises absolute value circuitry configured to receive data samples and output a first value corresponding to the magnitude of said data samples. An envelope tracker maintains an envelope output value and compares the first value to the current envelope output value and modifies the envelope output value based on said comparison to provide the envelope output value with predetermined attack and decay characteristics. The absolute value circuitry has a first input for receiving a first digital signal at a first sample rate and a second input for receiving an interpolated version of the first digital signal at a second sample rate which is higher than the first sample rate and outputs the first value based on the magnitudes of the samples received at the first input and the samples received at the second input. Using the first digital signal provides an early indication of any increases in signal envelope whereas the second digital signal can allow a more accurate estimation.

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Dunfermline, United Kingdom

Graeme Gordon Mackay