Intersil Americas Inc.

Grady M Wood

Harold William Satterfield

Fred F Greenfeld

A tester is configured to access and test each redundant channel of a voter. The tester is disposed between the voter and a multitude of redundant circuits supplying redundant channel signals to the voter. The tester includes a number of input ports receiving the redundant channel signals as well as the test signals. In response to a number of logic combinations of the test signals, the voter generates output signals each corresponding to one of the redundant channel signals. In response to other logic combinations of the test signals, the voter generates a voted output signal. The voter is optionally a majority voter.

Voter tester for redundant systems

A current averaging circuit for averaging a piecewise linear switching current waveform of a PWM power converter including first, second and third sample and hold circuits and a sample averaging circuit. The first sample and hold circuit samples a short duration of the current waveform for each PWM cycle and provides corresponding short samples. The second sample and hold circuit samples a long duration of each PWM cycle and provides corresponding long samples. The sample averaging circuit is coupled to the first and second sample and hold circuits, averages corresponding ones of the short and long samples and provides corresponding average values. The third sample and hold circuit samples each average value and provides a current average signal. The waveform may include ramp-on-a-step voltage pulses representing switching current. The current average signal is updated after each current pulse.

Current averaging circuit for a PWM power converter

An electroluminescent driver circuit with improved power consumption efficiency. In one embodiment, an electroluminescent driver circuit comprises a load to provide illumination, an inductor, a transistor and a plurality of switches. The inductor has a first side coupled to a positive terminal of a power supply and a second side selectively coupled to the load. The transistor is coupled to selectively conduct current from the second side of the inductor to a ground terminal of the power supply in response to a digital signal. The plurality of switches are coupled to the load to selectively charge and discharge the load. Moreover, the switches selectively provide a discharge path for positive charge on the load to be discharged to the positive terminal of the power supply.

Electroluminescent driver circuit

A multiplexed high voltage DC-AC driver including multiple DC-AC switches and decoder logic. Each DC-AC switch receives an input DC voltage and is operative, when enable, to toggle its output at a rate based on a master clock signal and at a voltage based on the input DC voltage. The DC-AC switches include one or more high side switches and a low side switch. The low side switch includes a clock inverter and operates out-of-phase relative to each high side switch. The decoder logic enables selected ones of the high side switches and enables the low side switch when any high side switch is enabled.

Multiplexed high voltage DC-AC driver

A switch includes first and second switch terminals, at least one output MOS transistor for selectively connecting the first and second switch terminals, and a driving current source for driving the at least one output MOS transistor. The switch may also include a current limiter for limiting the driving of the at least one output MOS transistor by the driving current source to establish a current limit. Furthermore, a controller may be included for the current limiter for controlling the current limit, such as by causing the current limiter to decrease the current limit based upon an increase in temperature of the integrated circuit or at periodic intervals to control rise and fall times of the at least one output MOS transistor.

Growing community of inventors

Satellite Beach, FL, United States of America

Grady M Wood