Emc IP Holding Company LLC

Netapp, Inc.

Network Appliance, Inc.

Grace Ho

James Yarbrough

Manpreet Singh

Bruce Alexander Wilford

David R Emberson

Vikram Venkataraghavan

Gokul Nadathur

Mark Himelstein

Rick Carlson

Vishwas Durai

Bill Katz

Jeffrey S Kimmel

Jeffrey S Bonwick

Robert L Fair

Richard Van Gaasbeck

Daniel Arai

Dan Arai

Alexander D Petruncola

Nareshkumar Maganlal Patel

Rich Van Gaasbeck

A system has a collection of central processing units. Each central processing unit is connected to at least one other central processing unit and has a path into flash memory resources. A central processing unit supports a mapping from a data address space, to a flash memory virtual address space, to a flash memory virtual page number to a flash memory physical address space.

Multiprocessor system with independent direct access to bulk solid state memory resources

In general, embodiments of the technology relate to a method for managing data. The method includes, in response to initiating garbage collection on a storage appliance, selecting a first block from the plurality of blocks based, at least in part, on a selection frequency; and performing a garbage collection operation on the first block to generate a first erased block in the storage appliance.

Method and system for garbage collection in a storage system which balances wear-leveling and performance

In general, embodiments of the technology relate to a method for storing data. More specifically, the method may include selecting a first RAID grid location in a RAID grid, where the first RAID grid location is flagged, selecting a second RAID grid location in the RAID grid, making a first determination that the second RAID grid location is not flagged, in response to the first determination, loading first data associated with the second RAID grid location into a cache, calculating a parity value for a corresponding set of RAID grid locations in a data grid using the first data in the cache, where the first RAID grid location and the second RAID grid location are in the set of RAID grid locations, and storing at least a copy of the first data and the parity value in a storage array comprising persistent storage.

Method and system for implementing multi-dimensional raid in an extensible storage array to optimize performance

Embodiments provide various techniques for dynamic adjustment of a number of threads for execution in any domain based on domain utilizations. In a multiprocessor system, the utilization for each domain is monitored. If a utilization of any of these domains changes, then the number of threads for each of the domains determined for execution may also be adjusted to adapt to the change.

Adjustment of threads for execution based on over-utilization of a domain in a multi-processor system by destroying parallizable group of threads in sub-domains

Adjustment of threads for execution based on over-utilization of a domain in a multi-processor system by sub-dividing parallizable group of threads to sub-domains

In a processing system which includes a physical processor that includes multiple logical processors, multiple domains are defined for multiple processes that can execute on the physical processor. Each of the processes is assigned to one of the domains. Processor utilization associated with the logical processors is measured, and each of the domains is allocated to a subset of the logical processors according to the processor utilization.

Method and apparatus for allocating shared resources to process domains according to current processor utilization in a shared resource processor

Embodiments of the invention may improve read operations for fully cached workloads on storage systems with limited processing or CPU-cache resources. Some embodiments employ an indicator such as a counter to indicate when the use of readahead analysis steps, such as resource, intensive predictive processing, is undesirable. In these embodiments, the counter is incremented for each buffer cache read that is successfully performed without the need for a disk input/output operation. When the counter variable exceeds a threshold such as, for example, a maximum readahead size, then the system advantageously foregoes predictive processing steps of the readahead analysis phase, and further foregoes a readahead execution phase. The foregoing results in a net performance benefit for the system based on a reduced likelihood of a need for an input/output operation, and further, based on a reduced likelihood of a need for predictive processing relating to readahead analysis and/or execution.

Cached reads for a storage system

Growing community of inventors

Sunnyvale, CA, United States of America

Grace Ho