Lam Research Corporation

Gowri Kota

Frank Lin

Qinghua Zhong

Jorge Luque

David M Schaefer

Yoko Yamaguchi Adams

A semiconductor device may be formed by the method comprising providing a patterned photoresist mask over the etch layer, the photoresist mask having at least one photoresist line having a pair of sidewalls ending at a line end, placing a coating over the at least one photoresist line comprising at least one cycle, wherein each cycle comprises: a) depositing a polymer layer over the photoresist line, wherein an amount of polymer at the line end is greater than an amount of polymer on the sidewalls, and b) hardening the polymer layer, and etching features into the etch layer through the photoresist mask, wherein a line end shortening (LES) is less than or equal to 1.

Line end shortening reduction during etch

A method of etching a substrate in a plasma processing chamber is disclosed. The method includes introducing the substrate having thereon an underlying layer, an anti-reflective layer above the underlying layer, and a photo-resist layer above the anti-reflective layer into the chamber. The method also includes flowing a gas mixture into the chamber, the gas mixture includes a flow of a hydrofluorocarbon gas, a flow of fluorocarbon gas, a flow of a halogen-containing gas other than the hydrofluorocarbon gas, and a flow of oxygen gas. The method further includes striking a plasma from the gas mixture. The method additionally includes etching at least through the anti-reflective layer with the plasma.

Methods for critical dimension control during plasma etching

A method for etching features in an etch layer is provided. A patterned photoresist mask is provided over the etch layer, the photoresist mask having at least one photoresist line having a pair of sidewalls ending at a line end is provided. A polymer layer is placed over the at least one photoresist line, wherein a thickness of the polymer layer at the line end of the photoresist line is greater than a thickness of the polymer layer on the sidewalls of the photoresist line. Features are etched into the etch layer through the photoresist mask, wherein a line end shortening (LES) ratio is less than or equal to 1.

A method for etching features in an etch layer is provided. A patterned photoresist mask is formed over the etch layer with at least one photoresist line having a pair of sidewalls ending at a line end. A coating is placed over the photoresist line comprising at least one cycle of depositing a polymer layer over the photoresist line, wherein an amount of polymer at the line end is greater than an amount of polymer on the sidewalls, and hardening the polymer layer. Features are etched into the etch layer through the photoresist mask, wherein a line end shortening (LES) is less than or equal to 1.

A method and apparatus is provided for measuring multiple locations on a wafer for controlling a subsequent semiconductor processing step to achieve greater dimensional uniformity across that wafer. The method and apparatus maps a dimension of a feature at multiple locations to create a dimension map, transforms the dimension map into a processing parameter map, and uses the processing parameter map to tailor the subsequent processing step to that specific wafer. The wafer can also be measured after the processing to compare an actual outcome with the targeted outcome, and the difference can be used to refine the transformation from a dimension map to a processing parameter map for a subsequent wafer.

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Fremont, CA, United States of America

Gowri Kota